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[Discuss-gnuradio] Split-function implementation of 802.11g OFDM PHY and

From: Nemanja Trecakov
Subject: [Discuss-gnuradio] Split-function implementation of 802.11g OFDM PHY and MAC on USRP2
Date: Fri, 12 Aug 2011 23:26:33 +0100

Hi list, 

My name
is Nemanja and I am working on my master thesis trying to implement
802.11g OFDM standard on USRP2 with XCVR2450. In order to meet the
timing requirements of the standard, I want to split the
functionality between the host and the FPGA, very similar to 
Split-functionality MACs project
Since 802.11g TX PHY has been developed by FTW
and further extended with MAC layer by Uwicore
both for use on the host, my approach would be to  use these and 
buffer the “completely baked”  TX  packets from the host on the
unused 1MB SRAM on the USRP2. These can then easily be sent with low
latency when the channel is sensed free. Moreover, the Carrier
Sensing with Collision Avoidance will be implemented on FGPA and 
based on RSSI from the daughter card. In the RX mode FPGA  should be
able to check the preamble in order to decide if the packet is for
this host or not, and accordingly proceed it to the host or discard.
However, since this standard is using OFDM, an FFT is needed. Maybe
FFT can be avoided by implementing a Look Up Table, which could be
used in closed networks where all senders are known. I will wait a
while with implementation of ACK and  RTS/CTS.   

I am using the following:

- Ubuntu 10.04
- GNUradio 3.3.0 with

I am a newbie to all of this and I have
a few questions:

1) Did anybody use this external SRAM
on USRP2 before? According to the FAQ page the usual FPGA build is
not using it.
However, my experience with these pages is that many of them are
outdated. I also found the folder called extramfifo in 
uhd/fpga/usrp2 folder for which I believe has something to do with
external RAM.True?

2) How to build the new FPGA UHD image?
I have access to Xilinx 12.4 on a Windows XP machine for building the
image. At first I will try only to add more code without omitting any
of the present code. I have read the discussion at
, where it is written that no project file should be made. However,
the process described is not fully clear to me.

3) Does firmware image also have to be
changed after modification with using the SRAM, or with any FPGA modification?

4) How to read RSSI? I have read at
that this could be used:

from the uhd api:


or in
python w/ gr-uhd 

But what is uhd api?  

BTW, I am aware that using RSSI from
XCVR2450 is the signal strength over wider bandwidth than used in the

Please feel free to come with any

Thank you in advance!

Nemanja Trecakov

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