Executing: "/media/thesis/Data/Downloads/Thesis/FM Reciever using GRC/fm_example.py"
linux; GNU C++ version 4.8.2; Boost_105400; UHD_003.008.000-18-g864f84b5
Using Volk machine: sse4_1_64_orc
-- Opening a USRP1 device...
-- Using FPGA clock rate of 64.000000MHz...
The hardware does not support the requested RX sample rate:
Target sample rate: 5.000000 MSps
Actual sample rate: 5.333333 MSps
-- Tune Request: 88.100000 MHz
-- The RF LO does not support the requested frequency:
-- Requested LO Frequency: 88.100000 MHz
-- RF LO Result: 88.099634 MHz
-- Attempted to use the DSP to reach the requested frequency:
-- Desired DSP Frequency: -0.000366 MHz
-- DSP Result: -0.000366 MHz
-- Successfully tuned to 88.100000 MHz
INFO: Audio sink arch: alsa
As we are doing all the simulations, we did not use any antenna yet. However, we are waiting for the arrival of the antenna LP0410 400 MHz to 1 GHz Log Periodic PCB directional antenna, at 5-6dBi Gain. We have purchased this antenna for it is capable to receive signals from 88.1MHz to 107.9MHz (frequency range of all the FM stations that we are about to receive).