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[ft-devel] [bug] --> [arm] Fix thumb2 inline assembly under LLVM.


From: duhuanpeng
Subject: [ft-devel] [bug] --> [arm] Fix thumb2 inline assembly under LLVM.
Date: Fri, 16 Mar 2018 14:33:58 +0800

Dear Chongyu Zhu,

What is your compiler's option(cflags)? 
What CPU and instruction set
have you tested it?

cortex-m0 does not support this instruction, cortex-m0 runs
thumb2 too. but it is a subset of thumb2.

http://git.savannah.gnu.org/cgit/freetype/freetype2.git/commit/?id=41632b58eff46d351fffa529a5f860eb63155818

> [arm] Fix thumb2 inline assembly under LLVM.
   still broken on cortex-m0, what is your compiler flags?

   Keil RVDS armcc ARMCT       gcc      
   [?]      --cpu=cortex-m3   
   [broken] --cpu=cortex-m0     -mcpu=cortex-m0
   [OK]     --cpu=cortex-r4


> When using `ADD' with an immediate operand, the instruction is
> actually `ADD Rd, Rn, #<imm12>', that is, the maximum of the
> immediate operand cannot exceed 4095.  It will fail to compile with
> LLVM.
> 
> However, in GCC, due to some legacy compatibility considerations,
> `ADD.W' will be automatically emitted when the immediate operand is
> larger than 4095.
> 
> * builds/unix/ftconfig.in, include/freetype/config/ftconfig.h
> (FT_MulFix_arm) [__GNUC__]: Support clang compiler.
> 
> * src/truetype/ttinterp.c (TT_MulFix14_arm) [__GNUC__]: Ditto.

>      __asm__ __volatile__ (
>        "smull  %1, %2, %4, %3\n\t"       /* (lo=%1,hi=%2) = a*b */
>        "mov    %0, %2, asr #31\n\t"      /* %0  = (hi >> 31) */
> +#ifdef __clang__
> +      "add.w  %0, %0, #0x8000\n\t"      /* %0 += 0x8000 */
> +#else
>        "add    %0, %0, #0x8000\n\t"      /* %0 += 0x8000 */
> +#endif
>        "adds   %1, %1, %0\n\t"           /* %1 += %0 */
>        "adc    %2, %2, #0\n\t"           /* %2 += carry */
>        "mov    %0, %1, lsr #16\n\t"      /* %0  = %1 >> 16 */

This will produce an error. could you take a look at this:
>>> http://lists.nongnu.org/archive/html/freetype-devel/2018-03/msg00062.html

anyway, this is easy, use a register[ip] to help:
  ldr  ip, =0x8000  ; compiler will help translate this too real arm 
instructions
  adds r0, r0, ip


The problem is cortex-m0 don't have a 32bit * 32bit instruction.
>        "smull  %1, %2, %4, %3\n\t"       /* (lo=%1,hi=%2) = a*b */

could you help to take a look at, is my guess right?
 http://lists.nongnu.org/archive/html/freetype-devel/2018-03/msg00065.html

Regards,
duhuanpeng




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