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Re: 8250 memory mapped UART

From: Lennart Sorensen
Subject: Re: 8250 memory mapped UART
Date: Mon, 27 Mar 2017 14:31:42 -0400
User-agent: Mutt/1.5.23 (2014-03-12)

On Mon, Mar 27, 2017 at 11:29:48PM +0530, Gailu Singh wrote:
> Can you please let me know how following three values are calculated in
> your patch. I am trying to understand how do I change it for my board.
>       port->board.base_baud = 4000000;
>       port->board.port_offset = 0x200;
>       port->board.base_offset = 0x1000;

I would think this means:

The configuration registers for the ports starts at the PCI base address
of the device + 0x1000, and then each additional port is 0x200 above that
(so port 2 would be at 0x1200 above the base address).

A base_baud of 4000000 would normally mean the UART is fed from a 64MHz
clock source.  Pretty sure every uart I have used, the base_baud was
1/16th of the clock input (except some cases on the AM57xx where it
uses 1/13th as far as I recall.  It's a bit odd sometimes).

Many PC boards in the past have used either 1.8432MHz or sometimes
14.7456 MHz, since that gives you perfect 115200 for the first one,
and 921600 for the second one, as well as all integer divisions of those.
After all with a base_baud of 4000000, a UART that only does integer
divisions would give you 117647 when you ask for 115200, which is
generally close enough.  Of course some newer designs allow fractional
divisions and can hence generate rather good results even with a non
ideal input clock.

Len Sorensen

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