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Re: Quoted file names matching a pattern?

From: Paul D. Smith
Subject: Re: Quoted file names matching a pattern?
Date: Thu, 30 Jun 2005 13:35:19 -0400

%% "Angel Tsankov" <address@hidden> writes:

  >> Basically, it is very, very difficult, even impossible, to handle
  >> filenames containing whitespace using make.

  at> Well, "very, very difficult" does NOT mean impossible, right?

I also said "even impossible".  Some things are possible.  Some things
are impossible.

  at> So, if it is possible to write a makefile to compile the .cpp
  at> files (some may contain whitespace in their name) in a folder,
  at> I'll be glad to know how this is done.

There is no way to do this using wildcard.  In fact, you can't
manipulate the filenames reliably with any make functions, because all
make functions work on words, and words are separated by whitespace.

You'd have to use the $(shell ...) function with a script that generated
filenames with whitespace escaped with "\".

What you can do is write targets and prerequisites with whitespace in
the names, using backslashes to escape the spaces:

    all: a\ file
            @echo "build $@ from $<"
    a\ file:
            touch "$@"

gives you:

    touch "a file"
    build all from a file

You can put the backslashed filenames in a variable, like this:

    FILES = a\ file another\ file yet\ another\ file

    all: $(FILES)
            touch "$@"

Will work.

Wildcard will not quote the spaces for you, so you can't use it here.
Also, you can't use functions like patsubst, suffix, prefix, dirname,
etc. on any value that contains whitespace; none of those will work
properly.  For example, given the value of FILES above this:


will give you this result:

    a\.o file.o another\.o file.o yet\.o another\.o file.o

And of course, you'll need to write all your own rules and be sure you
properly quote filenames: the builtin rules don't quote anything.

Most problematic, there is NO WAY to use multiple filenames obtained
from make (e.g., in a variable like $^) correctly in a command script,
because you can't quote it properly.  In my examples I used $@ which
always expands to exactly one filename, so you can easily quote it as
"$@".  Ditto for "$<", so writing a rule to build .o from .cpp for
example is fine.

But, when you want to link all those together you're going to have to
use the variable itself.  For example this should work:

    OBJS = a\ b.o d\ e.o f\ g.o
    all: program
    program: $(OBJS)
                link $(OBJS)
    %.o : %.c
                compile -o "$@" -c "$<"

but it won't work to do this:

    program: $(OBJS)
                link $^

 Paul D. Smith <address@hidden>          Find some GNU make tips at:            
 "Please remain calm...I may be mad, but I am a professional." --Mad Scientist

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