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Re: Need support regarding the execution order of GNU Make rules

From: Paul Smith
Subject: Re: Need support regarding the execution order of GNU Make rules
Date: Wed, 01 Apr 2015 01:13:11 -0400

On Wed, 2015-04-01 at 09:46 +0530, Basil Mathew wrote:
> In our build environment, the compilation of a C-file into the object file
> is a 2 step process as described below. We use the GNU’s “cpp.exe” to
> generate the dependency file and then compile the C source file using the
> specific compiler that is configured for the project. We have 2 separate
> make rules to get this done.
> The rule for compilation is defined as
> build_c: $(objects_c)
> %.o: %.c %.d
>     !!!!Execute the Compiler Call to create the object file

I'm not really sure why you have the object file depend on the
dependency (%.d) file.  That seems really strange to me.

> The rule for dependency generation is defined as
> %.d: %.c
>     !!!!Execute the cpp.exe call to generate the dependency file
> I find that the build works fine, no problem with the build.
> Only problem that I have is that I cannot explain why the dependencies
> generation phase for all the 30 or more C source files are executed first
> completely before the compilation commands for any C-source files are
> executed.
> I was assuming that the dependency generation for one C-source file will be
> completed followed by the compilation commands for the particular C-source
> file followed by the dependency generation for next C-source file and so on.

I assume, although you haven't said, that you are then using "include"
to include all the .d dependency files into your makefile, following the
model described in the GNU make manual.

The advanced autodependency paper on my site does explain this [1].  You
can also look at my post about constructed include files [2].

What happens is that the first thing make tries to do is rebuild all the
makefiles: both the main makefile ("Makefile") and ALSO all the included
makefiles.  In your case, you include all the .d files, and make can
find a rule (your second rule, for dependency generation) to rebuild
them if the .c file is newer.

So, make will build all the makefiles (.d files) first.  Once it's done
with that, make will re-invoke itself from scratch and start over.  This
time all the .d files are up to date, so make doesn't need to build them
and so it doesn't re-invoke itself, and then it proceeds on to build the
rest of the "normal" (.o) targets.

That's why it happens in two different steps.


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