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Re: [Qemu-arm] [Qemu-devel] [PATCH v2 1/2] target-arm: Fix handling of S

From: Alistair Francis
Subject: Re: [Qemu-arm] [Qemu-devel] [PATCH v2 1/2] target-arm: Fix handling of SDCR for 32-bit code
Date: Mon, 22 Feb 2016 10:08:00 -0800

On Fri, Feb 19, 2016 at 6:39 AM, Peter Maydell <address@hidden> wrote:
> Fix two issues with our implementation of the SDCR:
>  * it is only present from ARMv8 onwards
>  * it does not contain several of the trap bits present in its 64-bit
>    counterpart the MDCR_EL3
> Put the register description in the right place so that it does not
> get enabled for ARMv7 and earlier, and give it a write function so that
> we can mask out the bits which should not be allowed to have an effect
> if EL3 is 32-bit.
> Signed-off-by: Peter Maydell <address@hidden>

Acked-by: Alistair Francis <address@hidden>



> ---
>  target-arm/cpu.h    |  4 ++++
>  target-arm/helper.c | 23 +++++++++++++++--------
>  2 files changed, 19 insertions(+), 8 deletions(-)

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