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Re: [PATCH 08/13] target/arm: Add _aa64_ and _any_ versions of pmu_8_1 i
Re: [PATCH 08/13] target/arm: Add _aa64_ and _any_ versions of pmu_8_1 isar checks
Tue, 11 Feb 2020 10:40:59 -0800
Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.4.1
On 2/11/20 9:37 AM, Peter Maydell wrote:
> Add the 64-bit version of the "is this a v8.1 PMUv3?"
> ID register check function, and the _any_ version that
> checks for either AArch32 or AArch64 support. We'll use
> this in a later commit.
> We don't (yet) do any isar_feature checks on ID_AA64DFR1_EL1,
> but we move id_aa64dfr1 into the ARMISARegisters struct with
> id_aa64dfr0, for consistency.
> Signed-off-by: Peter Maydell <address@hidden>
> target/arm/cpu.h | 15 +++++++++++++--
> target/arm/cpu.c | 3 ++-
> target/arm/cpu64.c | 6 +++---
> target/arm/helper.c | 12 +++++++-----
> 4 files changed, 25 insertions(+), 11 deletions(-)
Normally we also read the value of the ISAR registers for KVM. I know these
tests don't apply along these paths, but for consistency...
Reviewed-by: Richard Henderson <address@hidden>
- Re: [PATCH 09/13] target/arm: Implement ARMv8.1-PMU extension, (continued)
- [PATCH 05/13] target/arm: Add and use FIELD definitions for ID_AA64DFR0_EL1, Peter Maydell, 2020/02/11
- [PATCH 01/13] target/arm: Add _aa32_ to isar_feature functions testing 32-bit ID registers, Peter Maydell, 2020/02/11
- [PATCH 11/13] target/arm: Provide ARMv8.4-PMU in '-cpu max', Peter Maydell, 2020/02/11
- [PATCH 08/13] target/arm: Add _aa64_ and _any_ versions of pmu_8_1 isar checks, Peter Maydell, 2020/02/11
- [PATCH 04/13] target/arm: Factor out PMU register definitions, Peter Maydell, 2020/02/11
- [PATCH 07/13] target/arm: Define an aa32_pmu_8_1 isar feature test function, Peter Maydell, 2020/02/11
- [PATCH 13/13] target/arm: Correct handling of PMCR_EL0.LC bit, Peter Maydell, 2020/02/11
- [PATCH 12/13] target/arm: Correct definition of PMCRDP, Peter Maydell, 2020/02/11