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Re: [PATCH 09/16] target/arm: Enable FEAT_Debugv8p4 for -cpu max


From: Peter Maydell
Subject: Re: [PATCH 09/16] target/arm: Enable FEAT_Debugv8p4 for -cpu max
Date: Mon, 11 Apr 2022 14:27:53 +0100

On Sat, 9 Apr 2022 at 01:18, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> This extension concerns changes to the External Debug interface,
> with Secure and Non-secure access to the debug registers, and all
> of it is outside the scope of QEMU.  Indicating support for this
> is mandatory with FEAT_SEL2, which we do implement.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>  target/arm/cpu64.c   | 2 +-
>  target/arm/cpu_tcg.c | 4 ++--
>  2 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
> index 6b6422070d..f20fb6d9e1 100644
> --- a/target/arm/cpu64.c
> +++ b/target/arm/cpu64.c
> @@ -854,7 +854,7 @@ static void aarch64_max_initfn(Object *obj)
>      cpu->isar.id_aa64zfr0 = t;
>
>      t = cpu->isar.id_aa64dfr0;
> -    t = FIELD_DP64(t, ID_AA64DFR0, DEBUGVER, 8);  /* FEAT_Debugv8p2 */
> +    t = FIELD_DP64(t, ID_AA64DFR0, DEBUGVER, 9);  /* FEAT_Debugv8p4 */
>      t = FIELD_DP64(t, ID_AA64DFR0, PMUVER, 5);    /* FEAT_PMUv3p4 */
>      cpu->isar.id_aa64dfr0 = t;
>
> diff --git a/target/arm/cpu_tcg.c b/target/arm/cpu_tcg.c
> index ac91bbea9b..a443e8c48a 100644
> --- a/target/arm/cpu_tcg.c
> +++ b/target/arm/cpu_tcg.c
> @@ -79,8 +79,8 @@ void arm32_max_features(ARMCPU *cpu)
>      cpu->isar.id_pfr2 = t;
>
>      t = cpu->isar.id_dfr0;
> -    t = FIELD_DP32(t, ID_DFR0, COPDBG, 8);        /* FEAT_Debugv8p2 */
> -    t = FIELD_DP32(t, ID_DFR0, COPSDBG, 8);       /* FEAT_Debugv8p2 */
> +    t = FIELD_DP32(t, ID_DFR0, COPDBG, 9);        /* FEAT_Debugv8p4 */
> +    t = FIELD_DP32(t, ID_DFR0, COPSDBG, 9);       /* FEAT_Debugv8p4 */
>      t = FIELD_DP32(t, ID_DFR0, PERFMON, 5);       /* FEAT_PMUv3p4 */
>      cpu->isar.id_dfr0 = t;
>  }

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

thanks
-- PMM



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