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Re: [Qemu-devel] Re: POST failure (loop) with isapc and seabios

From: Gleb Natapov
Subject: Re: [Qemu-devel] Re: POST failure (loop) with isapc and seabios
Date: Wed, 25 Nov 2009 18:42:05 +0200

On Wed, Nov 25, 2009 at 10:31:16AM -0500, Kevin O'Connor wrote:
> On Wed, Nov 25, 2009 at 02:20:39PM +0200, Gleb Natapov wrote:
> > On Wed, Nov 25, 2009 at 06:09:51AM +0000, Jamie Lokier wrote:
> > > But the BIOS must be reloaded from ROM, I'm guessing, if the keyboard
> > > controller method is used and the word asking for a branch back to the
> > > application has not been set.  Because that's how a modern OS (if not
> > > using ACPI) asks for a system reset.
> > > 
> > > Do you think the above is (a) correct, and (b) what's implemented?
> > > 
> > Do different things during reset depending on CMOS values doesn't sound
> > right to me. I don't know what is implemented right now. I thought that
> > we reload BIOS on reset.
> We could have qemu do a soft reset (not reload rom) on a triple fault
> or keyboard controller reset, and then have SeaBIOS request a hard
> reset (have qemu reload rom) if it detects a soft reset that is not a
> "resume" request.
> I'm also not sure what qemu does today.
There is not notion of "soft" reset or "hard" reset in QEMU today. On
real modern HW the things are even more complex. There are power planes
that can be powered off independently. Think about computer in S3 sleep
state. Almost everything is powered of ("hard" reset) except of the memory
and RTC.


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