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Re: [Qemu-devel] Re: POST failure (loop) with isapc and seabios

From: Kevin O'Connor
Subject: Re: [Qemu-devel] Re: POST failure (loop) with isapc and seabios
Date: Wed, 25 Nov 2009 17:53:49 -0500
User-agent: Mutt/1.5.19 (2009-01-05)

On Wed, Nov 25, 2009 at 11:04:20PM +0100, Sebastian Herbszt wrote:
>> Do different things during reset depending on CMOS values doesn't sound
>> right to me. I don't know what is implemented right now. I thought that
>> we reload BIOS on reset.
> Currently the BIOS seems to be only loaded once and not reloaded
> during the life time of a VM.
> I don't think there is a notion of BIOS reload on real hardware. CPU
> access to it is either directed to the rom (power-up configuration,
> all those fancy reset conditions) or to ram.

I see a "BIOS reload" as equivalent to directing access to rom.

> How is shadowing currently implemented in qemu? Is the only BIOS
> copy overwritten or is the rom copy separate from the ram copy?

My understanding is that both the ram and rom are kept.  (Though, on a
"BIOS reload" I don't know if the ram is preserved.)

To summarize the discussion so far, there seems to be a potential
issue with reset:

* If qemu doesn't reload the bios (a soft-reset) then there is a
  potential issue with the bios and option roms not running properly
  after a system reset invoked by Linux or other modern OSs.

* If qemu does reload the bios (a hard-reset) then there is a good
  chance that old DOS programs will break when they invoke a reset in
  an attempt to switch from protected mode to real mode.

Is that correct?


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