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[Qemu-devel] [PATCH 3/7] target-arm: Translate with VFP len/stride from
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PATCH 3/7] target-arm: Translate with VFP len/stride from TB flags, not CPUState |
Date: |
Fri, 7 Jan 2011 15:06:30 +0000 |
When translating, the VFP vector length and stride for this TB are encoded
in the TB flags; the CPUState copies may be different and must not be used.
Signed-off-by: Peter Maydell <address@hidden>
---
target-arm/translate.c | 10 +++++++---
1 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/target-arm/translate.c b/target-arm/translate.c
index d10b484..10419bf 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -60,6 +60,8 @@ typedef struct DisasContext {
int user;
#endif
int vfp_enabled;
+ int vec_len;
+ int vec_stride;
} DisasContext;
#if defined(CONFIG_USER_ONLY)
@@ -2895,7 +2897,7 @@ static int disas_vfp_insn(CPUState * env, DisasContext
*s, uint32_t insn)
rm = VFP_SREG_M(insn);
}
- veclen = env->vfp.vec_len;
+ veclen = s->vec_len;
if (op == 15 && rn > 3)
veclen = 0;
@@ -2916,9 +2918,9 @@ static int disas_vfp_insn(CPUState * env, DisasContext
*s, uint32_t insn)
veclen = 0;
} else {
if (dp)
- delta_d = (env->vfp.vec_stride >> 1) + 1;
+ delta_d = (s->vec_stride >> 1) + 1;
else
- delta_d = env->vfp.vec_stride + 1;
+ delta_d = s->vec_stride + 1;
if ((rm & bank_mask) == 0) {
/* mixed scalar/vector */
@@ -9083,6 +9085,8 @@ static inline void
gen_intermediate_code_internal(CPUState *env,
}
#endif
dc->vfp_enabled = ((tb->flags & (1 << 7)) != 0);
+ dc->vec_len = (tb->flags >> 1) & 7;
+ dc->vec_stride = (tb->flags >> 4) & 3;
cpu_F0s = tcg_temp_new_i32();
cpu_F1s = tcg_temp_new_i32();
cpu_F0d = tcg_temp_new_i64();
--
1.6.3.3
- [Qemu-devel] [PATCH 0/7] target-arm: Translate based on TB flags, not CPUState, Peter Maydell, 2011/01/07
- [Qemu-devel] [PATCH 6/7] target-arm: Set privileged bit in TB flags correctly for M profile, Peter Maydell, 2011/01/07
- [Qemu-devel] [PATCH 3/7] target-arm: Translate with VFP len/stride from TB flags, not CPUState,
Peter Maydell <=
- [Qemu-devel] [PATCH 2/7] target-arm: Translate with VFP-enabled from TB flags, not CPUState, Peter Maydell, 2011/01/07
- [Qemu-devel] [PATCH 4/7] target-arm: Translate with Thumb state from TB flags, not CPUState, Peter Maydell, 2011/01/07
- [Qemu-devel] [PATCH 1/7] target-arm: Don't generate code specific to current CPU mode for SRS, Peter Maydell, 2011/01/07
- [Qemu-devel] [PATCH 5/7] target-arm: Translate with condexec bits from TB flags, not CPUState, Peter Maydell, 2011/01/07
- [Qemu-devel] [PATCH 7/7] target-arm: Translate with user-state from TB flags, not CPUState, Peter Maydell, 2011/01/07
- Re: [Qemu-devel] [PATCH 0/7] target-arm: Translate based on TB flags, not CPUState, Aurelien Jarno, 2011/01/07