Re: [Qemu-devel] [PATCH v4 04/11] ARM: exynos4210: IRQ subsystem support.

[Peter Maydell]

On 21 December 2011 15:08, Evgeny Voevodin <address@hidden> wrote:
> On 12/21/2011 05:50 PM, Peter Maydell wrote:
>> arm_gic.c exposes the CPU and distributor interfaces as their own
>> memory regions now -- you shouldn't need any of this intermediate
>> layer of functions.

> These functions are not actually for splitting CPU and Distributer
> interfaces.
> In our board we have two GICs - internal and external. Internal GIC is
> completely
> matching arm_gic.c.
>
> Internal GIC CPU[n] and Distributer[n] interfaces are at 0x100 and 0x1000
> offsets from
> 0x10500000 base.
>
> But external GIC is different.
> It's CPU[0] interface is at 0x0 offset from 0x10480000 base
> and
>      CPU[1] interface is at 0x8000 offset from 0x10480000 base
>
> It's Distributer[0] interface is at 0x0 offset from 0x10490000 base
> and
>      Distributer[1] interface is at 0x8000 offset from 0x10490000 base
>
> [n] - is corresponding to SMP CPU Core.
>
> So, we need these wrapper functions for External GIC.

I don't understand this reasoning. If there are two GICs then
you should just instantiate two GIC devices and map and/or alias
their memory regions at the right addresses. The reason why
the distributor and CPU interfaces are exposed as multiple
memory regions is exactly so you can put them at different
offsets for different boards/CPUs. If arm_gic doesn't
provide suitably split up memory regions then it should be
fixed to do so.

-- PMM