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Re: [Qemu-devel] [PATCH 4/7] move CPU models from cpus-x86_64.conf to C
From: |
Igor Mammedov |
Subject: |
Re: [Qemu-devel] [PATCH 4/7] move CPU models from cpus-x86_64.conf to C |
Date: |
Mon, 10 Sep 2012 15:40:58 +0200 |
On Wed, 5 Sep 2012 17:41:10 -0300
Eduardo Habkost <address@hidden> wrote:
> Those models are maintained by QEMU and may require compatibility code
> to be added when making some changes. Keeping the data in the C source
> code should make it simpler to handle those details.
>
> Signed-off-by: Eduardo Habkost <address@hidden>
> ---
> sysconfigs/target/cpus-x86_64.conf | 129 +---------------------
> target-i386/cpu.c | 219
> +++++++++++++++++++++++++++++++++++++ 2 files changed, 220 insertions(+),
> 128 deletions(-)
>
> diff --git a/sysconfigs/target/cpus-x86_64.conf
> b/sysconfigs/target/cpus-x86_64.conf index cee0ea9..3902189 100644
> --- a/sysconfigs/target/cpus-x86_64.conf
> +++ b/sysconfigs/target/cpus-x86_64.conf
> @@ -1,128 +1 @@
> -# x86 CPU MODELS
> -
> -[cpudef]
> - name = "Conroe"
> - level = "2"
> - vendor = "GenuineIntel"
> - family = "6"
> - model = "2"
> - stepping = "3"
> - feature_edx = "sse2 sse fxsr mmx clflush pse36 pat cmov mca pge mtrr
> sep apic cx8 mce pae msr tsc pse de fpu"
> - feature_ecx = "ssse3 sse3"
> - extfeature_edx = "i64 xd syscall"
> - extfeature_ecx = "lahf_lm"
> - xlevel = "0x8000000A"
> - model_id = "Intel Celeron_4x0 (Conroe/Merom Class Core 2)"
> -
> -[cpudef]
> - name = "Penryn"
> - level = "2"
> - vendor = "GenuineIntel"
> - family = "6"
> - model = "2"
> - stepping = "3"
> - feature_edx = "sse2 sse fxsr mmx clflush pse36 pat cmov mca pge mtrr
> sep apic cx8 mce pae msr tsc pse de fpu"
> - feature_ecx = "sse4.1 cx16 ssse3 sse3"
> - extfeature_edx = "i64 xd syscall"
> - extfeature_ecx = "lahf_lm"
> - xlevel = "0x8000000A"
> - model_id = "Intel Core 2 Duo P9xxx (Penryn Class Core 2)"
> -
> -[cpudef]
> - name = "Nehalem"
> - level = "2"
> - vendor = "GenuineIntel"
> - family = "6"
> - model = "2"
> - stepping = "3"
> - feature_edx = "sse2 sse fxsr mmx clflush pse36 pat cmov mca pge mtrr
> sep apic cx8 mce pae msr tsc pse de fpu"
> - feature_ecx = "popcnt sse4.2 sse4.1 cx16 ssse3 sse3"
> - extfeature_edx = "i64 syscall xd"
> - extfeature_ecx = "lahf_lm"
> - xlevel = "0x8000000A"
> - model_id = "Intel Core i7 9xx (Nehalem Class Core i7)"
> -
> -[cpudef]
> - name = "Westmere"
> - level = "11"
> - vendor = "GenuineIntel"
> - family = "6"
> - model = "44"
> - stepping = "1"
> - feature_edx = "sse2 sse fxsr mmx clflush pse36 pat cmov mca pge mtrr
> sep apic cx8 mce pae msr tsc pse de fpu"
> - feature_ecx = "aes popcnt sse4.2 sse4.1 cx16 ssse3 sse3"
> - extfeature_edx = "i64 syscall xd"
> - extfeature_ecx = "lahf_lm"
> - xlevel = "0x8000000A"
> - model_id = "Westmere E56xx/L56xx/X56xx (Nehalem-C)"
> -
> -[cpudef]
> - name = "SandyBridge"
> - level = "0xd"
> - vendor = "GenuineIntel"
> - family = "6"
> - model = "42"
> - stepping = "1"
> - feature_edx = " sse2 sse fxsr mmx clflush pse36 pat cmov mca pge mtrr
> sep apic cx8 mce pae msr tsc pse de fpu"
> - feature_ecx = "avx xsave aes tsc-deadline popcnt x2apic sse4.2 sse4.1
> cx16 ssse3 pclmulqdq sse3"
> - extfeature_edx = "i64 rdtscp nx syscall "
> - extfeature_ecx = "lahf_lm"
> - xlevel = "0x8000000A"
> - model_id = "Intel Xeon E312xx (Sandy Bridge)"
> -
> -[cpudef]
> - name = "Opteron_G1"
> - level = "5"
> - vendor = "AuthenticAMD"
> - family = "15"
> - model = "6"
> - stepping = "1"
> - feature_edx = "sse2 sse fxsr mmx clflush pse36 pat cmov mca pge mtrr
> sep apic cx8 mce pae msr tsc pse de fpu"
> - feature_ecx = "sse3"
> - extfeature_edx = "lm fxsr mmx nx pse36 pat cmov mca pge mtrr syscall
> apic cx8 mce pae msr tsc pse de fpu"
> - extfeature_ecx = " "
> - xlevel = "0x80000008"
> - model_id = "AMD Opteron 240 (Gen 1 Class Opteron)"
> -
> -[cpudef]
> - name = "Opteron_G2"
> - level = "5"
> - vendor = "AuthenticAMD"
> - family = "15"
> - model = "6"
> - stepping = "1"
> - feature_edx = "sse2 sse fxsr mmx clflush pse36 pat cmov mca pge mtrr
> sep apic cx8 mce pae msr tsc pse de fpu"
> - feature_ecx = "cx16 sse3"
> - extfeature_edx = "lm rdtscp fxsr mmx nx pse36 pat cmov mca pge mtrr
> syscall apic cx8 mce pae msr tsc pse de fpu"
> - extfeature_ecx = "svm lahf_lm"
> - xlevel = "0x80000008"
> - model_id = "AMD Opteron 22xx (Gen 2 Class Opteron)"
> -
> -[cpudef]
> - name = "Opteron_G3"
> - level = "5"
> - vendor = "AuthenticAMD"
> - family = "15"
> - model = "6"
> - stepping = "1"
> - feature_edx = "sse2 sse fxsr mmx clflush pse36 pat cmov mca pge mtrr
> sep apic cx8 mce pae msr tsc pse de fpu"
> - feature_ecx = "popcnt cx16 monitor sse3"
> - extfeature_edx = "lm rdtscp fxsr mmx nx pse36 pat cmov mca pge mtrr
> syscall apic cx8 mce pae msr tsc pse de fpu"
> - extfeature_ecx = "misalignsse sse4a abm svm lahf_lm"
> - xlevel = "0x80000008"
> - model_id = "AMD Opteron 23xx (Gen 3 Class Opteron)"
> -
> -[cpudef]
> - name = "Opteron_G4"
> - level = "0xd"
> - vendor = "AuthenticAMD"
> - family = "21"
> - model = "1"
> - stepping = "2"
> - feature_edx = "sse2 sse fxsr mmx clflush pse36 pat cmov mca pge mtrr
> sep apic cx8 mce pae msr tsc pse de fpu"
> - feature_ecx = "avx xsave aes popcnt sse4.2 sse4.1 cx16 ssse3 pclmulqdq
> sse3"
> - extfeature_edx = "lm rdtscp pdpe1gb fxsr mmx nx pse36 pat cmov mca pge
> mtrr syscall apic cx8 mce pae msr tsc pse de fpu"
> - extfeature_ecx = " fma4 xop 3dnowprefetch misalignsse sse4a abm svm
> lahf_lm"
> - xlevel = "0x8000001A"
> - model_id = "AMD Opteron 62xx class CPU"
> -
> +# The CPU models from this file are now built-in in the QEMU source code
> diff --git a/target-i386/cpu.c b/target-i386/cpu.c
> index d2af0ff..73302d8 100644
> --- a/target-i386/cpu.c
> +++ b/target-i386/cpu.c
> @@ -490,6 +490,225 @@ static x86_def_t builtin_x86_defs[] = {
> .xlevel = 0x8000000A,
> .model_id = "Intel(R) Atom(TM) CPU N270 @ 1.60GHz",
> },
> + {
> + .name = "Conroe",
> + .level = 2,
> + .vendor1 = CPUID_VENDOR_INTEL_1,
> + .vendor2 = CPUID_VENDOR_INTEL_2,
> + .vendor3 = CPUID_VENDOR_INTEL_3,
> + .family = 6,
> + .model = 2,
> + .stepping = 3,
> + .features = CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
> + CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV |
> CPUID_MCA |
> + CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
> + CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
> + CPUID_DE | CPUID_FP87,
> + .ext_features = CPUID_EXT_SSSE3 | CPUID_EXT_SSE3,
> + .ext2_features = CPUID_EXT2_LM | CPUID_EXT2_NX |
> CPUID_EXT2_SYSCALL,
> + .ext3_features = CPUID_EXT3_LAHF_LM,
> + .xlevel = 0x8000000A,
> + .model_id = "Intel Celeron_4x0 (Conroe/Merom Class Core 2)",
> + },
> + {
> + .name = "Penryn",
> + .level = 2,
> + .vendor1 = CPUID_VENDOR_INTEL_1,
> + .vendor2 = CPUID_VENDOR_INTEL_2,
> + .vendor3 = CPUID_VENDOR_INTEL_3,
> + .family = 6,
> + .model = 2,
> + .stepping = 3,
> + .features = CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
> + CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV |
> CPUID_MCA |
> + CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
> + CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
> + CPUID_DE | CPUID_FP87,
> + .ext_features = CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3
> |
> + CPUID_EXT_SSE3,
> + .ext2_features = CPUID_EXT2_LM | CPUID_EXT2_NX |
> CPUID_EXT2_SYSCALL,
> + .ext3_features = CPUID_EXT3_LAHF_LM,
> + .xlevel = 0x8000000A,
> + .model_id = "Intel Core 2 Duo P9xxx (Penryn Class Core 2)",
> + },
> + {
> + .name = "Nehalem",
> + .level = 2,
> + .vendor1 = CPUID_VENDOR_INTEL_1,
> + .vendor2 = CPUID_VENDOR_INTEL_2,
> + .vendor3 = CPUID_VENDOR_INTEL_3,
> + .family = 6,
> + .model = 2,
> + .stepping = 3,
> + .features = CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
> + CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV |
> CPUID_MCA |
> + CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
> + CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
> + CPUID_DE | CPUID_FP87,
> + .ext_features = CPUID_EXT_POPCNT | CPUID_EXT_SSE42 |
> CPUID_EXT_SSE41 |
> + CPUID_EXT_CX16 | CPUID_EXT_SSSE3 | CPUID_EXT_SSE3,
> + .ext2_features = CPUID_EXT2_LM | CPUID_EXT2_SYSCALL |
> CPUID_EXT2_NX,
> + .ext3_features = CPUID_EXT3_LAHF_LM,
> + .xlevel = 0x8000000A,
> + .model_id = "Intel Core i7 9xx (Nehalem Class Core i7)",
> + },
> + {
> + .name = "Westmere",
> + .level = 11,
> + .vendor1 = CPUID_VENDOR_INTEL_1,
> + .vendor2 = CPUID_VENDOR_INTEL_2,
> + .vendor3 = CPUID_VENDOR_INTEL_3,
> + .family = 6,
> + .model = 44,
> + .stepping = 1,
> + .features = CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
> + CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV |
> CPUID_MCA |
> + CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
> + CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
> + CPUID_DE | CPUID_FP87,
> + .ext_features = CPUID_EXT_AES | CPUID_EXT_POPCNT | CPUID_EXT_SSE42
> |
> + CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3 |
> + CPUID_EXT_SSE3,
> + .ext2_features = CPUID_EXT2_LM | CPUID_EXT2_SYSCALL |
> CPUID_EXT2_NX,
> + .ext3_features = CPUID_EXT3_LAHF_LM,
> + .xlevel = 0x8000000A,
> + .model_id = "Westmere E56xx/L56xx/X56xx (Nehalem-C)",
> + },
> + {
> + .name = "SandyBridge",
> + .level = 0xd,
> + .vendor1 = CPUID_VENDOR_INTEL_1,
> + .vendor2 = CPUID_VENDOR_INTEL_2,
> + .vendor3 = CPUID_VENDOR_INTEL_3,
> + .family = 6,
> + .model = 42,
> + .stepping = 1,
> + .features = CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
> + CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV |
> CPUID_MCA |
> + CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
> + CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
> + CPUID_DE | CPUID_FP87,
> + .ext_features = CPUID_EXT_AVX | CPUID_EXT_XSAVE | CPUID_EXT_AES |
> + CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_POPCNT |
> + CPUID_EXT_X2APIC | CPUID_EXT_SSE42 | CPUID_EXT_SSE41 |
> + CPUID_EXT_CX16 | CPUID_EXT_SSSE3 | CPUID_EXT_PCLMULQDQ |
> + CPUID_EXT_SSE3,
> + .ext2_features = CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_NX
> |
> + CPUID_EXT2_SYSCALL,
> + .ext3_features = CPUID_EXT3_LAHF_LM,
> + .xlevel = 0x8000000A,
> + .model_id = "Intel Xeon E312xx (Sandy Bridge)",
> + },
> + {
> + .name = "Opteron_G1",
> + .level = 5,
> + .vendor1 = CPUID_VENDOR_AMD_1,
> + .vendor2 = CPUID_VENDOR_AMD_2,
> + .vendor3 = CPUID_VENDOR_AMD_3,
> + .family = 15,
> + .model = 6,
> + .stepping = 1,
> + .features = CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
> + CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV |
> CPUID_MCA |
> + CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
> + CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
> + CPUID_DE | CPUID_FP87,
> + .ext_features = CPUID_EXT_SSE3,
> + .ext2_features = CPUID_EXT2_LM | CPUID_EXT2_FXSR | CPUID_EXT2_MMX |
> + CPUID_EXT2_NX | CPUID_EXT2_PSE36 | CPUID_EXT2_PAT |
> + CPUID_EXT2_CMOV | CPUID_EXT2_MCA | CPUID_EXT2_PGE |
> + CPUID_EXT2_MTRR | CPUID_EXT2_SYSCALL | CPUID_EXT2_APIC |
> + CPUID_EXT2_CX8 | CPUID_EXT2_MCE | CPUID_EXT2_PAE |
> CPUID_EXT2_MSR |
> + CPUID_EXT2_TSC | CPUID_EXT2_PSE | CPUID_EXT2_DE |
> CPUID_EXT2_FPU,
> + .xlevel = 0x80000008,
> + .model_id = "AMD Opteron 240 (Gen 1 Class Opteron)",
> + },
> + {
> + .name = "Opteron_G2",
> + .level = 5,
> + .vendor1 = CPUID_VENDOR_AMD_1,
> + .vendor2 = CPUID_VENDOR_AMD_2,
> + .vendor3 = CPUID_VENDOR_AMD_3,
> + .family = 15,
> + .model = 6,
> + .stepping = 1,
> + .features = CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
> + CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV |
> CPUID_MCA |
> + CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
> + CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
> + CPUID_DE | CPUID_FP87,
> + .ext_features = CPUID_EXT_CX16 | CPUID_EXT_SSE3,
> + .ext2_features = CPUID_EXT2_LM | CPUID_EXT2_RDTSCP |
> CPUID_EXT2_FXSR |
> + CPUID_EXT2_MMX | CPUID_EXT2_NX | CPUID_EXT2_PSE36 |
> + CPUID_EXT2_PAT | CPUID_EXT2_CMOV | CPUID_EXT2_MCA |
> + CPUID_EXT2_PGE | CPUID_EXT2_MTRR | CPUID_EXT2_SYSCALL |
> + CPUID_EXT2_APIC | CPUID_EXT2_CX8 | CPUID_EXT2_MCE |
> + CPUID_EXT2_PAE | CPUID_EXT2_MSR | CPUID_EXT2_TSC |
> CPUID_EXT2_PSE |
> + CPUID_EXT2_DE | CPUID_EXT2_FPU,
> + .ext3_features = CPUID_EXT3_SVM | CPUID_EXT3_LAHF_LM,
> + .xlevel = 0x80000008,
> + .model_id = "AMD Opteron 22xx (Gen 2 Class Opteron)",
> + },
> + {
> + .name = "Opteron_G3",
> + .level = 5,
> + .vendor1 = CPUID_VENDOR_AMD_1,
> + .vendor2 = CPUID_VENDOR_AMD_2,
> + .vendor3 = CPUID_VENDOR_AMD_3,
> + .family = 15,
> + .model = 6,
> + .stepping = 1,
> + .features = CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
> + CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV |
> CPUID_MCA |
> + CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
> + CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
> + CPUID_DE | CPUID_FP87,
> + .ext_features = CPUID_EXT_POPCNT | CPUID_EXT_CX16 |
> CPUID_EXT_MONITOR |
> + CPUID_EXT_SSE3,
> + .ext2_features = CPUID_EXT2_LM | CPUID_EXT2_RDTSCP |
> CPUID_EXT2_FXSR |
> + CPUID_EXT2_MMX | CPUID_EXT2_NX | CPUID_EXT2_PSE36 |
> + CPUID_EXT2_PAT | CPUID_EXT2_CMOV | CPUID_EXT2_MCA |
> + CPUID_EXT2_PGE | CPUID_EXT2_MTRR | CPUID_EXT2_SYSCALL |
> + CPUID_EXT2_APIC | CPUID_EXT2_CX8 | CPUID_EXT2_MCE |
> + CPUID_EXT2_PAE | CPUID_EXT2_MSR | CPUID_EXT2_TSC |
> CPUID_EXT2_PSE |
> + CPUID_EXT2_DE | CPUID_EXT2_FPU,
> + .ext3_features = CPUID_EXT3_MISALIGNSSE | CPUID_EXT3_SSE4A |
> + CPUID_EXT3_ABM | CPUID_EXT3_SVM | CPUID_EXT3_LAHF_LM,
> + .xlevel = 0x80000008,
> + .model_id = "AMD Opteron 23xx (Gen 3 Class Opteron)",
> + },
> + {
> + .name = "Opteron_G4",
> + .level = 0xd,
> + .vendor1 = CPUID_VENDOR_AMD_1,
> + .vendor2 = CPUID_VENDOR_AMD_2,
> + .vendor3 = CPUID_VENDOR_AMD_3,
> + .family = 21,
> + .model = 1,
> + .stepping = 2,
> + .features = CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
> + CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV |
> CPUID_MCA |
> + CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
> + CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
> + CPUID_DE | CPUID_FP87,
> + .ext_features = CPUID_EXT_AVX | CPUID_EXT_XSAVE | CPUID_EXT_AES |
> + CPUID_EXT_POPCNT | CPUID_EXT_SSE42 | CPUID_EXT_SSE41 |
> + CPUID_EXT_CX16 | CPUID_EXT_SSSE3 | CPUID_EXT_PCLMULQDQ |
> + CPUID_EXT_SSE3,
> + .ext2_features = CPUID_EXT2_LM | CPUID_EXT2_RDTSCP |
> + CPUID_EXT2_PDPE1GB | CPUID_EXT2_FXSR | CPUID_EXT2_MMX |
> + CPUID_EXT2_NX | CPUID_EXT2_PSE36 | CPUID_EXT2_PAT |
> + CPUID_EXT2_CMOV | CPUID_EXT2_MCA | CPUID_EXT2_PGE |
> + CPUID_EXT2_MTRR | CPUID_EXT2_SYSCALL | CPUID_EXT2_APIC |
> + CPUID_EXT2_CX8 | CPUID_EXT2_MCE | CPUID_EXT2_PAE |
> CPUID_EXT2_MSR |
> + CPUID_EXT2_TSC | CPUID_EXT2_PSE | CPUID_EXT2_DE |
> CPUID_EXT2_FPU,
> + .ext3_features = CPUID_EXT3_FMA4 | CPUID_EXT3_XOP |
> + CPUID_EXT3_3DNOWPREFETCH | CPUID_EXT3_MISALIGNSSE |
> + CPUID_EXT3_SSE4A | CPUID_EXT3_ABM | CPUID_EXT3_SVM |
> + CPUID_EXT3_LAHF_LM,
> + .xlevel = 0x8000001A,
> + .model_id = "AMD Opteron 62xx class CPU",
> + },
> };
>
> static int cpu_x86_fill_model_id(char *str)
Reviewed-by: Igor Mammedov <address@hidden>
- Re: [Qemu-devel] [PATCH 7/7] i386: kill cpudef config section support, (continued)
- [Qemu-devel] [PATCH 4/7] move CPU models from cpus-x86_64.conf to C, Eduardo Habkost, 2012/09/05
- Re: [Qemu-devel] [PATCH 4/7] move CPU models from cpus-x86_64.conf to C, Igor Mammedov, 2012/09/10
- Re: [Qemu-devel] [PATCH 4/7] move CPU models from cpus-x86_64.conf to C, Igor Mammedov, 2012/09/10
- Re: [Qemu-devel] [PATCH 4/7] move CPU models from cpus-x86_64.conf to C, Igor Mammedov, 2012/09/10
- Re: [Qemu-devel] [PATCH 4/7] move CPU models from cpus-x86_64.conf to C, Don Slutz, 2012/09/10
- Re: [Qemu-devel] [PATCH 4/7] move CPU models from cpus-x86_64.conf to C, Andreas Färber, 2012/09/10
- Re: [Qemu-devel] [PATCH 4/7] move CPU models from cpus-x86_64.conf to C, Eduardo Habkost, 2012/09/10
- Re: [Qemu-devel] [PATCH 4/7] move CPU models from cpus-x86_64.conf to C, Andreas Färber, 2012/09/10
- Re: [Qemu-devel] [PATCH 4/7] move CPU models from cpus-x86_64.conf to C, Eduardo Habkost, 2012/09/10
Re: [Qemu-devel] [PATCH 4/7] move CPU models from cpus-x86_64.conf to C,
Igor Mammedov <=
[Qemu-devel] [PATCH 2/7] Drop cpu_list_id macro, Eduardo Habkost, 2012/09/05
[Qemu-devel] [PATCH 5/7] eliminate cpus-x86_64.conf file, Eduardo Habkost, 2012/09/05
[Qemu-devel] [PATCH 6/7] x86_cpudef_setup: coding style change, Eduardo Habkost, 2012/09/05
Re: [Qemu-devel] [PATCH 0/7] x86 CPU patches that didn't get into 1.2, Andreas Färber, 2012/09/10