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[Qemu-devel] [PATCH 03/10] target-i386: SSE4.2: fix pcmpXstri instructio
From: |
Aurelien Jarno |
Subject: |
[Qemu-devel] [PATCH 03/10] target-i386: SSE4.2: fix pcmpXstri instructions |
Date: |
Tue, 26 Mar 2013 20:01:35 +0100 |
ffs1 returns the first bit set to one starting counting from the most
significant bit.
pcmpXstri returns the most significant bit set to one, starting counting
from the least significant bit.
Signed-off-by: Aurelien Jarno <address@hidden>
---
target-i386/ops_sse.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target-i386/ops_sse.h b/target-i386/ops_sse.h
index 0136df9..0667c87 100644
--- a/target-i386/ops_sse.h
+++ b/target-i386/ops_sse.h
@@ -2099,7 +2099,7 @@ void glue(helper_pcmpestri, SUFFIX)(CPUX86State *env, Reg
*d, Reg *s,
pcmp_elen(env, R_EAX, ctrl));
if (res) {
- env->regs[R_ECX] = ((ctrl & (1 << 6)) ? rffs1 : ffs1)(res) - 1;
+ env->regs[R_ECX] = (ctrl & (1 << 6)) ? rffs1(res) - 1 : 32 - ffs1(res);
} else {
env->regs[R_ECX] = 16 >> (ctrl & (1 << 0));
}
@@ -2137,7 +2137,7 @@ void glue(helper_pcmpistri, SUFFIX)(CPUX86State *env, Reg
*d, Reg *s,
pcmp_ilen(d, ctrl));
if (res) {
- env->regs[R_ECX] = ((ctrl & (1 << 6)) ? rffs1 : ffs1)(res) - 1;
+ env->regs[R_ECX] = (ctrl & (1 << 6)) ? rffs1(res) - 1 : 32 - ffs1(res);
} else {
env->regs[R_ECX] = 16 >> (ctrl & (1 << 0));
}
--
1.7.10.4
- [Qemu-devel] [PATCH 00/10] target-i386: fix and enable SSE4.1 and SSE4.2, Aurelien Jarno, 2013/03/26
- [Qemu-devel] [PATCH 08/10] target-i386: SSE4.2: fix pcmpXstrX instructions with "Masked(-)" polarity, Aurelien Jarno, 2013/03/26
- [Qemu-devel] [PATCH 05/10] target-i386: SSE4.2: fix pcmpXstrX instructions in "Ranges" mode, Aurelien Jarno, 2013/03/26
- [Qemu-devel] [PATCH 03/10] target-i386: SSE4.2: fix pcmpXstri instructions,
Aurelien Jarno <=
- [Qemu-devel] [PATCH 04/10] target-i386: SSE4.2: fix pcmpXstrm instructions, Aurelien Jarno, 2013/03/26
- [Qemu-devel] [PATCH 02/10] target-i386: SSE4.2: fix pcmpgtq instruction, Aurelien Jarno, 2013/03/26
- [Qemu-devel] [PATCH 09/10] target-i386: enable SSE4.1 and SSE4.2 in TCG mode, Aurelien Jarno, 2013/03/26
- [Qemu-devel] [PATCH 10/10] target-i386: SSE4.2: use clz32/ctz32 instead of reinventing the wheel, Aurelien Jarno, 2013/03/26
- [Qemu-devel] [PATCH 06/10] target-i386: SSE4.2: fix pcmpXstrX instructions in "Equal each" mode, Aurelien Jarno, 2013/03/26