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Re: [Qemu-devel] [PATCH 10/10] target-arm: Abstract out load/store from
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH 10/10] target-arm: Abstract out load/store from a vaddr in AArch32 |
Date: |
Fri, 24 May 2013 16:54:03 +0100 |
On 23 May 2013 13:00, Peter Maydell <address@hidden> wrote:
> +#define DO_GEN_ST(OP) \
> +static inline void gen_aa32_##OP(TCGv_i32 val, TCGv_i32 addr, int index) \
> +{ \
> + TCGv addr64 = tcg_temp_new(); \
> + TCGv val64 = tcg_temp_new(); \
> + tcg_gen_extu_i32_i64(addr64, addr); \
> + tcg_gen_extu_i32_i64(val64, val); \
> + tcg_gen_qemu_##OP(val64, addr64, index); \
> + tcg_temp_free(addr64); \
This is missing a 'tcg_temp_free(val64);'.
If I add that I can get 32 bit ARM cpu/guests to run in a
qemu-system-aarch64 binary (without it they work but the tcg
temp leak alarm goes off).
-- PMM
- [Qemu-devel] [PATCH 07/10] target-arm: Remove gen_{ld, st}* from Thumb insns, (continued)
- [Qemu-devel] [PATCH 07/10] target-arm: Remove gen_{ld, st}* from Thumb insns, Peter Maydell, 2013/05/23
- [Qemu-devel] [PATCH 03/10] target-arm: Remove uses of gen_{ld, st}* from iWMMXt code, Peter Maydell, 2013/05/23
- [Qemu-devel] [PATCH 06/10] target-arm: Remove gen_{ld, st}* from basic ARM insns, Peter Maydell, 2013/05/23
- [Qemu-devel] [PATCH 01/10] target-arm: Don't use TCGv when we mean TCGv_i32, Peter Maydell, 2013/05/23
- [Qemu-devel] [PATCH 04/10] target-arm: Remove uses of gen_{ld, st}* from Neon code, Peter Maydell, 2013/05/23
- [Qemu-devel] [PATCH 08/10] target-arm: Remove gen_{ld, st}* from thumb2 decoder, Peter Maydell, 2013/05/23
- [Qemu-devel] [PATCH 10/10] target-arm: Abstract out load/store from a vaddr in AArch32, Peter Maydell, 2013/05/23
- [Qemu-devel] [PATCH 05/10] target-arm: Remove use of gen_{ld, st}* from ldrex/strex, Peter Maydell, 2013/05/23
- [Qemu-devel] [PATCH 02/10] target-arm: Remove gen_ld64() and gen_st64(), Peter Maydell, 2013/05/23
- Re: [Qemu-devel] [PATCH 00/10] target-arm: fix TCGv usage (AArch64 prep), Blue Swirl, 2013/05/26