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Re: [Qemu-devel] [PATCH v2 12/12] target-arm: A64: add support for compa
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From: |
Richard Henderson |
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Subject: |
Re: [Qemu-devel] [PATCH v2 12/12] target-arm: A64: add support for compare and branch imm |
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Date: |
Thu, 05 Dec 2013 10:59:01 +1300 |
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User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.1.0 |
On 12/05/2013 08:33 AM, Peter Maydell wrote:
> +static TCGv_i64 read_cpu_reg(DisasContext *s, int reg, int sf)
> +{
> + TCGv_i64 v = new_tmp_a64_zero(s);
> + if (reg != 31) {
This is going to issue a garbage "movi tmp, 0" opcode for every non-XZR read.
While the optimizer will remove that, it's only going to slow things down, and
easily avoidable.
Better to allocate the temporary and only perform the movi for reg == 31.
r~
- Re: [Qemu-devel] [PATCH v2 08/12] target-arm: A64: add support for B and BL insns, (continued)
[Qemu-devel] [PATCH v2 10/12] target-arm: A64: add support for conditional branches, Peter Maydell, 2013/12/04
[Qemu-devel] [PATCH v2 11/12] target-arm: A64: add support for 'test and branch' imm, Peter Maydell, 2013/12/04
[Qemu-devel] [PATCH v2 02/12] target-arm: A64: add set_pc cpu method, Peter Maydell, 2013/12/04
[Qemu-devel] [PATCH v2 06/12] target-arm: A64: provide skeleton for a64 insn decoding, Peter Maydell, 2013/12/04
[Qemu-devel] [PATCH v2 04/12] target-arm: Support fp registers in gdb stub, Peter Maydell, 2013/12/04
[Qemu-devel] [PATCH v2 12/12] target-arm: A64: add support for compare and branch imm, Peter Maydell, 2013/12/04
- Re: [Qemu-devel] [PATCH v2 12/12] target-arm: A64: add support for compare and branch imm,
Richard Henderson <=
[Qemu-devel] [PATCH v2 01/12] target-arm: Split A64 from A32/T32 gen_intermediate_code_internal(), Peter Maydell, 2013/12/04
[Qemu-devel] [PATCH v2 03/12] target-arm: A64: provide functions for accessing FPCR and FPSR, Peter Maydell, 2013/12/04
[Qemu-devel] [PATCH v2 05/12] target-arm: A64: add stubs for a64 specific helpers, Peter Maydell, 2013/12/04