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[Qemu-devel] [PULL 18/28] target-arm: Don't define any MMU_MODE*_SUFFIXe
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 18/28] target-arm: Don't define any MMU_MODE*_SUFFIXes |
Date: |
Thu, 5 Feb 2015 14:02:57 +0000 |
target-arm doesn't use any of the MMU-mode specific cpu ldst
accessor functions. Suppress their generation by not defining
any of the MMU_MODE*_SUFFIX macros. ("user" and "kernel" are
too simplistic as descriptions of indexes 0 and 1 anyway.)
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Greg Bellows <address@hidden>
Reviewed-by: Edgar E. Iglesias <address@hidden>
---
target-arm/cpu.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 92c6ac6..3585754 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -1645,8 +1645,6 @@ typedef enum ARMMMUIdx {
ARMMMUIdx_S1NSE1 = 8,
} ARMMMUIdx;
-#define MMU_MODE0_SUFFIX _user
-#define MMU_MODE1_SUFFIX _kernel
#define MMU_USER_IDX 0
/* Return the exception level we're running at if this is our mmu_idx */
--
1.9.1
- [Qemu-devel] [PULL 26/28] target-arm: KVM64: Get and Sync up guest register state like kvm32., (continued)
- [Qemu-devel] [PULL 26/28] target-arm: KVM64: Get and Sync up guest register state like kvm32., Peter Maydell, 2015/02/05
- [Qemu-devel] [PULL 27/28] target-arm: Guest cpu endianness determination for virtio KVM ARM/ARM64, Peter Maydell, 2015/02/05
- [Qemu-devel] [PULL 25/28] disas/arm-a64.cc: Tell libvixl correct code addresses, Peter Maydell, 2015/02/05
- [Qemu-devel] [PULL 20/28] target-arm: Pass mmu_idx to get_phys_addr(), Peter Maydell, 2015/02/05
- [Qemu-devel] [PULL 23/28] target-arm: Fix brace style in reindented code, Peter Maydell, 2015/02/05
- [Qemu-devel] [PULL 12/28] hw/arm/virt: explain device-to-transport mapping in create_virtio_devices(), Peter Maydell, 2015/02/05
- [Qemu-devel] [PULL 22/28] target-arm: Reindent ancient page-table-walk code, Peter Maydell, 2015/02/05
- [Qemu-devel] [PULL 17/28] target-arm: Use correct mmu_idx for unprivileged loads and stores, Peter Maydell, 2015/02/05
- [Qemu-devel] [PULL 11/28] target-arm: check that LSB <= MSB in BFI instruction, Peter Maydell, 2015/02/05
- [Qemu-devel] [PULL 08/28] target-arm: Add checks that cpreg raw accesses are handled, Peter Maydell, 2015/02/05
- [Qemu-devel] [PULL 18/28] target-arm: Don't define any MMU_MODE*_SUFFIXes,
Peter Maydell <=
- [Qemu-devel] [PULL 15/28] target-arm/translate-a64: Fix wrong mmu_idx usage for LDT/STT, Peter Maydell, 2015/02/05
- [Qemu-devel] [PULL 19/28] target-arm: Split AArch64 cases out of ats_write(), Peter Maydell, 2015/02/05
- [Qemu-devel] [PULL 06/28] target-arm: Add missing SP_ELx register definition, Peter Maydell, 2015/02/05
- [Qemu-devel] [PULL 03/28] target-arm: Fix RVBAR_EL1 register encoding, Peter Maydell, 2015/02/05
- [Qemu-devel] [PULL 21/28] target-arm: Use mmu_idx in get_phys_addr(), Peter Maydell, 2015/02/05
- [Qemu-devel] [PULL 09/28] Fix FMULX not squashing denormalized inputs when FZ is set., Peter Maydell, 2015/02/05
- [Qemu-devel] [PULL 14/28] target-arm: Make arm_current_el() return sensible values for M profile, Peter Maydell, 2015/02/05
- [Qemu-devel] [PULL 16/28] target-arm: Define correct mmu_idx values and pass them in TB flags, Peter Maydell, 2015/02/05
- [Qemu-devel] [PULL 04/28] target-arm: Add extended RVBAR support, Peter Maydell, 2015/02/05
- [Qemu-devel] [PULL 13/28] cpu_ldst.h: Allow NB_MMU_MODES to be 7, Peter Maydell, 2015/02/05