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Re: [Qemu-devel] Help on TLB Flush

From: Mark Burton
Subject: Re: [Qemu-devel] Help on TLB Flush
Date: Thu, 12 Feb 2015 17:02:44 +0100

> On 12 Feb 2015, at 16:38, Alexander Graf <address@hidden> wrote:
> On 12.02.15 15:58, Peter Maydell wrote:
>> On 12 February 2015 at 14:45, Alexander Graf <address@hidden> wrote:
>>> almost nobody except x86 does global flushes
>> All ARM TLB maintenance operations have both "this CPU only"
>> and "all TLBs in the Inner Shareable domain" [that's ARM-speak
>> for "every CPU core in the cluster"] variants (the latter
>> being the TLB *IS operations). Looking at Linux's
>> arch/arm64/mm/tlb.S and arch/arm64/include/asm/tlbflush.h
>> most of the operations defined there use the IS variants.
> Wow, did anyone benchmark this? I know that PPC switched away from
> global flushes and instead tracks the CPUs a task was running on to
> limit the scope of CPUs that need to flush.

Doesn’t that mean you have to signal a specific CPU to cause it to flush 
itself…. Isn’t that in itself expensive? Do you have to organise some sort of 
atomicity yourself around that too?



> Alex

         +44 (0)20 7100 3485 x 210
 +33 (0)5 33 52 01 77x 210

        +33 (0)603762104

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