[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] [PATCH v7 2/6] Implement GIC-500 base class
From: |
Pavel Fedin |
Subject: |
Re: [Qemu-devel] [PATCH v7 2/6] Implement GIC-500 base class |
Date: |
Sun, 26 Jul 2015 16:52:10 +0300 |
Hello!
> So how do LPIs work? They have IDs above 1023.
Currently we don't have LPIs. Shlomo's SW emulation did not include them.
> > +#define GICV3_NCPU 64
>
> Where does '64' come from as a maximum limit?
We don't use Aff2 field as far as i know. It's Shlomo's limitation, not my one.
> This whole struct reads like "we just took the GICv2 state
> and changed it as little as possible beyond bumping the
> NCPU define a bit". That doesn't make me very confident
> that it's actually correct for GICv3...
At least, with complete Shlomo's SW emulation code, it works.
And could you be not so strict on this file? It's actually Shlomo's work, not
my one, i include it only because i need to base on something. He will fix up
the rest of SW emulation stuff.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
[Qemu-devel] [PATCH v7 3/6] Extract some reusable vGIC code, Pavel Fedin, 2015/07/24