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Re: [Qemu-devel] [Qemu-ppc] [PATCH 03/77] ppc: Do some batching of TCG t
From: |
David Gibson |
Subject: |
Re: [Qemu-devel] [Qemu-ppc] [PATCH 03/77] ppc: Do some batching of TCG tlb flushes |
Date: |
Thu, 19 Nov 2015 17:09:06 +1100 |
User-agent: |
Mutt/1.5.23 (2015-06-09) |
On Mon, Nov 16, 2015 at 09:16:08PM +1100, Benjamin Herrenschmidt wrote:
> On Mon, 2015-11-16 at 16:00 +1100, David Gibson wrote:
> >
> > > //#define DEBUG_MMU
> > > //#define DEBUG_BATS
> > > @@ -1940,6 +1941,7 @@ void ppc_tlb_invalidate_all(CPUPPCState *env)
> > > case POWERPC_MMU_2_03:
> > > case POWERPC_MMU_2_06:
> > > case POWERPC_MMU_2_07:
> > > + env->tlb_need_flush = 0;
> > > #endif /* defined(TARGET_PPC64) */
> > > tlb_flush(CPU(cpu), 1);
> > > break;
> >
> > Any particular reason you're leaving this one as an immediate rather
> > than deferred flush?
>
> A couple yes. It's mostly unused on server CPUs (we don't do tlbia),
> and it's used by ppc_cpu_reset(). In that latter case, I like having
> everything really cleaned up ...
>
> > Should you be clearing the pending flush flag cpu_reset()?
>
> That should happen as a result of the above.
Ok.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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[Qemu-devel] [PATCH 08/77] ppc: Add number of threads per core to the processor definition, Benjamin Herrenschmidt, 2015/11/10
[Qemu-devel] [PATCH 06/77] ppc: Add macros to register hypervisor mode SPRs, Benjamin Herrenschmidt, 2015/11/10
[Qemu-devel] [PATCH 14/77] ppc: Change 'invalid' bit mask of tlbiel and tlbie, Benjamin Herrenschmidt, 2015/11/10