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Re: [Qemu-devel] [PATCH 02/10] compiler.h: add QEMU_CACHELINE + QEMU_ALI

From: Laurent Desnogues
Subject: Re: [Qemu-devel] [PATCH 02/10] compiler.h: add QEMU_CACHELINE + QEMU_ALIGN() + QEMU_CACHELINE_ALIGNED
Date: Wed, 6 Apr 2016 14:02:25 +0200

On Wed, Apr 6, 2016 at 1:44 PM, Paolo Bonzini <address@hidden> wrote:
> On 05/04/2016 22:09, Lluís Vilanova wrote:
>> Ah. That's just an example. For cross-compilation you would use a different
>> march argument (or none to use the default target sub-arch) and get the
>> parameter for the target processor. This should already be known by 
>> configure as
>> part of the arguments to select the cross-compiler and target architecture
>> (e.g., CC).
> I would just use 64, with special cases for PPC and s390... even for
> AArch64 128 seems a little wasteful.

As far as I know, the only AArch64 CPU to have 128-byte cache line is
Cavium ThunderX (it seems to also be the case for Cavium MIPS-based


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