|Subject:||Re: [Qemu-devel] best way to implement emulation of AArch64 tagged addresses|
|Date:||Mon, 11 Apr 2016 06:58:49 -0600|
On 04/08/2016 05:29 PM, Thomas Hanson wrote:
Looking at tcg_out_tlb_load():
If I'm reading the pseudo-assembler of the function names correctly, it looks
like in the i386 code we're already masking the address being checked:
tgen_arithi(s, ARITH_AND + trexw, r1, TARGET_PAGE_MASK | (aligned ? s_mask
: 0), 0);
where TARGET_PAGE_MASK is a simple all-1's mask in the appropriate upper bits.
Can we just poke some 0's into that mask in the tag locations?
No, because we'd no longer have a sign-extended 32-bit value, as fits in that immediate operand field. To load the constant you're asking for, we'd need a 64-bit move insn and another register.
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