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Re: [Qemu-devel] ARM Cortex R5 + VFP3

From: Karthik
Subject: Re: [Qemu-devel] ARM Cortex R5 + VFP3
Date: Tue, 24 May 2016 19:19:32 +0530

ahh okay. The code I don't think writes to CPACR_EL1 register, but it runs
on the hardware anywary.

I`ll double check.

Thanks for the tip.

Best regards,

On Tue, May 24, 2016 at 7:07 PM, Peter Maydell <address@hidden>

> On 24 May 2016 at 14:07, Karthik <address@hidden> wrote:
> > I am working on adding support for a Spansion microcontroller which has
> an
> > Cortex R5 core + VFP3 co processor.
> >
> > I have added the below line
> > set_feature(&cpu->env, ARM_FEATURE_VFP3)
> > to cortex_r5_initfn at /target-arm/cpu.c
> >
> > But, still I got undefined exception when the processor encountered any
> > instructions.
> Has your guest code actually enabled the floating point?
> It needs to write to CPACR_EL1 itself to set the FPEXC bit. Otherwise
> we will correctly generate an exception, just as the real hardware
> will. The code you mention is in CONFIG_USER_ONLY because if we
> are only emulating a user process then we simulate the behaviour that
> a Linux kernel has of setting the CPACR correctly. For system
> emulation setting the bit is the guest code's responsibility.
> thanks
> -- PMM

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