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Re: [Qemu-devel] [SeaBIOS] [PATCH v5] fw/pci: Add support for mapping In
Re: [Qemu-devel] [SeaBIOS] [PATCH v5] fw/pci: Add support for mapping Intel IGD via QEMU
Wed, 01 Jun 2016 11:26:54 +0200
On Di, 2016-05-17 at 14:44 -0600, Alex Williamson wrote:
> QEMU provides two fw_cfg files to support IGD. The first holds the
> OpRegion data which holds the Video BIOS Table (VBT). This needs to
> be copied into reserved memory and the address stored in the ASL
> Storage register of the device at 0xFC offset in PCI config space.
> The OpRegion is generally 8KB. This file is named "etc/igd-opregion".
> The second file tells us the required size of the stolen memory space
> for the device. This space requires 1MB alignment and is generally
> either 1MB to 8MB depending on hardware config, but may be hundreds of
> MB for user specified stolen memory. The base address of the reserved
> memory allocated for this is written back to the Base Data of Stolen
> Memory register (BDSM) at PCI config offset 0x5C on the device. This
> file is named "etc/igd-bdsm-size".
> QEMU documents these fw_cfg entries in docs/igd-assign.txt.
> Signed-off-by: Alex Williamson <address@hidden>
> v6: fw_cfg BDSM entry now holds an 8-byte size integer as suggested
> by Gerd. Also renamed to etc/igd-bdsm-size. Filter based on bdf
> to only make use of this for the Intel VGA device at address
> 00:02.0, not that QEMU should attach this to anything else.
> As always, comments appreciated. I expect this will be on hold
> pending the QEMU support:
qemu patches are merged meanwhile.
Patch applied to master and cherry-picked into 1.9-stable.
- Re: [Qemu-devel] [SeaBIOS] [PATCH v5] fw/pci: Add support for mapping Intel IGD via QEMU,
Gerd Hoffmann <=