Re: [Qemu-devel] [PATCH v8 2/8] register: Add Register API

[Peter Maydell]

On 24 June 2016 at 16:42, Alistair Francis <address@hidden> wrote:
> This API provides some encapsulation of registers and factors out some
> common functionality to common code. Bits of device state (usually MMIO
> registers) often have all sorts of access restrictions and semantics
> associated with them. This API allows you to define what those
> restrictions are on a bit-by-bit basis.
>
> Helper functions are then used to access the register which observe the
> semantics defined by the RegisterAccessInfo struct.
>
> Some features:
> Bits can be marked as read_only (ro field)
> Bits can be marked as write-1-clear (w1c field)
> Bits can be marked as reserved (rsvd field)
> Reset values can be defined (reset)
> Bits can be marked clear on read (cor)
> Pre and post action callbacks can be added to read and write ops
> Verbose debugging info can be enabled/disabled

> +uint64_t register_read(RegisterInfo *reg, uint64_t re, const char* prefix,
> +                       bool debug)
> +{
> +    uint64_t ret;
> +    const RegisterAccessInfo *ac;
> +
> +    assert(reg);
> +
> +    ac = reg->access;
> +    if (!ac || !ac->name) {
> +        qemu_log_mask(LOG_GUEST_ERROR, "%s: read from undefined device 
> state\n",
> +                      prefix);
> +        return 0;
> +    }
> +
> +    ret = reg->data ? register_read_val(reg) : ac->reset;
> +
> +    /* Mask based on the read enable size */
> +    ret &= re;
> +    register_write_val(reg, ret & ~ac->cor);

If you do a byte read on a word-size register then the
masking with re will result in our writing back zeroes
to the high bits of the word, won't it?

thanks
-- PMM