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Re: [Qemu-devel] [PATCH v8 2/8] register: Add Register API
From: |
Alistair Francis |
Subject: |
Re: [Qemu-devel] [PATCH v8 2/8] register: Add Register API |
Date: |
Mon, 27 Jun 2016 08:51:31 -0700 |
On Mon, Jun 27, 2016 at 7:24 AM, Peter Maydell <address@hidden> wrote:
> On 24 June 2016 at 16:42, Alistair Francis <address@hidden> wrote:
>> This API provides some encapsulation of registers and factors out some
>> common functionality to common code. Bits of device state (usually MMIO
>> registers) often have all sorts of access restrictions and semantics
>> associated with them. This API allows you to define what those
>> restrictions are on a bit-by-bit basis.
>>
>> Helper functions are then used to access the register which observe the
>> semantics defined by the RegisterAccessInfo struct.
>>
>> Some features:
>> Bits can be marked as read_only (ro field)
>> Bits can be marked as write-1-clear (w1c field)
>> Bits can be marked as reserved (rsvd field)
>> Reset values can be defined (reset)
>> Bits can be marked clear on read (cor)
>> Pre and post action callbacks can be added to read and write ops
>> Verbose debugging info can be enabled/disabled
>
>> +uint64_t register_read(RegisterInfo *reg, uint64_t re, const char* prefix,
>> + bool debug)
>> +{
>> + uint64_t ret;
>> + const RegisterAccessInfo *ac;
>> +
>> + assert(reg);
>> +
>> + ac = reg->access;
>> + if (!ac || !ac->name) {
>> + qemu_log_mask(LOG_GUEST_ERROR, "%s: read from undefined device
>> state\n",
>> + prefix);
>> + return 0;
>> + }
>> +
>> + ret = reg->data ? register_read_val(reg) : ac->reset;
>> +
>> + /* Mask based on the read enable size */
>> + ret &= re;
>> + register_write_val(reg, ret & ~ac->cor);
>
> If you do a byte read on a word-size register then the
> masking with re will result in our writing back zeroes
> to the high bits of the word, won't it?
You are right it will. I have changed it to use the re (read enabled)
variable to mask the cor (clear on read) variable in instead.
Then after the write function is called the return variable is masked
so that the post_write hook gets passed the correct value.
Thanks,
Alistair
>
> thanks
> -- PMM
>
- [Qemu-devel] [PATCH v8 0/8] data-driven device registers, Alistair Francis, 2016/06/24
- [Qemu-devel] [PATCH v8 1/8] bitops: Add MAKE_64BIT_MASK macro, Alistair Francis, 2016/06/24
- [Qemu-devel] [PATCH v8 2/8] register: Add Register API, Alistair Francis, 2016/06/24
- [Qemu-devel] [PATCH v8 4/8] register: Define REG and FIELD macros, Alistair Francis, 2016/06/24
- [Qemu-devel] [PATCH v8 3/8] register: Add Memory API glue, Alistair Francis, 2016/06/24
- [Qemu-devel] [PATCH v8 5/8] register: QOMify, Alistair Francis, 2016/06/24
- [Qemu-devel] [PATCH v8 6/8] register: Add block initialise helper, Alistair Francis, 2016/06/24
- [Qemu-devel] [PATCH v8 7/8] dma: Add Xilinx Zynq devcfg device model, Alistair Francis, 2016/06/24