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[Qemu-devel] [PULL v5 00/18] tcg queued patches
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PULL v5 00/18] tcg queued patches |
Date: |
Wed, 14 Sep 2016 09:19:55 -0700 |
Changes since last:
* Some cleanup in the size+alignment patch
* Bug fixed in GETPC patch causing "make check" failure.
The pc adjustment moved to the (really) very last place,
where it's now applied during TARGET_HAS_PRECISE_SMC.
* tcg/mips improved for r6
* tcg/aarch64 improved for dmb ishld
* target-arm/aarch64 emits finer grained barriers for dmb
Retested on i686, x64, ppc64, ppc64le, arm, aarch64, s390x.
r~
The following changes since commit 507e4ddc3abf67391bcbc9624fd60b969c159b78:
Merge remote-tracking branch 'remotes/mjt/tags/trivial-patches-fetch' into
staging (2016-09-13 17:55:35 +0100)
are available in the git repository at:
git://github.com/rth7680/qemu.git tags/pull-tcg-20160914
for you to fetch changes up to ff95d7e000739149237d201037d5918439e69626:
tcg: Optimize fence instructions (2016-09-13 19:15:09 -0700)
----------------------------------------------------------------
tcg queued patches
----------------------------------------------------------------
Pranith Kumar (15):
Introduce TCGOpcode for memory barrier
tcg/i386: Add support for fence
tcg/aarch64: Add support for fence
tcg/arm: Add support for fence
tcg/ia64: Add support for fence
tcg/mips: Add support for fence
tcg/ppc: Add support for fence
tcg/s390: Add support for fence
tcg/sparc: Add support for fence
tcg/tci: Add support for fence
target-alpha: Generate fence op
target-arm: Generate fences in ARMv7 frontend
target-aarch64: Generate fences for aarch64
target-i386: Generate fences for x86
tcg: Optimize fence instructions
Richard Henderson (3):
tcg: Support arbitrary size + alignment
tcg: Merge GETPC and GETRA
cpu-exec: Check -dfilter for -d cpu
cpu-exec.c | 3 +-
cputlb.c | 6 ++--
include/exec/exec-all.h | 9 ++---
softmmu_template.h | 48 ++++++++-------------------
target-alpha/translate.c | 4 +--
target-arm/helper.c | 6 ++--
target-arm/translate-a64.c | 27 ++++++++++++++-
target-arm/translate.c | 4 +--
target-i386/translate.c | 8 +++++
target-mips/op_helper.c | 18 +++++-----
tcg/README | 17 ++++++++++
tcg/aarch64/tcg-target.inc.c | 35 ++++++++++++++++----
tcg/arm/tcg-target.inc.c | 37 +++++++++++++++++----
tcg/i386/tcg-target.inc.c | 36 +++++++++++++++-----
tcg/ia64/tcg-target.inc.c | 27 +++++++++++----
tcg/mips/tcg-target.inc.c | 41 +++++++++++++++++++++--
tcg/optimize.c | 39 ++++++++++++++++++++++
tcg/ppc/tcg-target.inc.c | 79 +++++++++++++++++++++++++++++---------------
tcg/s390/tcg-target.inc.c | 26 ++++++++++-----
tcg/sparc/tcg-target.inc.c | 29 +++++++++++++---
tcg/tcg-op.c | 17 ++++++++++
tcg/tcg-op.h | 2 ++
tcg/tcg-opc.h | 2 ++
tcg/tcg.h | 68 ++++++++++++++++++++------------------
tcg/tci/tcg-target.inc.c | 3 ++
tci.c | 4 +++
translate-all.c | 2 ++
user-exec.c | 7 ++--
28 files changed, 436 insertions(+), 168 deletions(-)
- [Qemu-devel] [PULL v5 00/18] tcg queued patches,
Richard Henderson <=
- [Qemu-devel] [PULL v5 03/18] cpu-exec: Check -dfilter for -d cpu, Richard Henderson, 2016/09/14
- [Qemu-devel] [PULL v5 01/18] tcg: Support arbitrary size + alignment, Richard Henderson, 2016/09/14
- [Qemu-devel] [PULL v5 04/18] Introduce TCGOpcode for memory barrier, Richard Henderson, 2016/09/14
- [Qemu-devel] [PULL v5 02/18] tcg: Merge GETPC and GETRA, Richard Henderson, 2016/09/14
- [Qemu-devel] [PULL v5 05/18] tcg/i386: Add support for fence, Richard Henderson, 2016/09/14
- [Qemu-devel] [PULL v5 06/18] tcg/aarch64: Add support for fence, Richard Henderson, 2016/09/14
- [Qemu-devel] [PULL v5 07/18] tcg/arm: Add support for fence, Richard Henderson, 2016/09/14
- [Qemu-devel] [PULL v5 08/18] tcg/ia64: Add support for fence, Richard Henderson, 2016/09/14
- [Qemu-devel] [PULL v5 10/18] tcg/ppc: Add support for fence, Richard Henderson, 2016/09/14
- [Qemu-devel] [PULL v5 11/18] tcg/s390: Add support for fence, Richard Henderson, 2016/09/14