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Re: [Qemu-devel] [PATCH v3 30/34] linux-user: remove handling of ARM's E
From: |
Alex Bennée |
Subject: |
Re: [Qemu-devel] [PATCH v3 30/34] linux-user: remove handling of ARM's EXCP_STREX |
Date: |
Thu, 15 Sep 2016 10:36:09 +0100 |
User-agent: |
mu4e 0.9.17; emacs 25.1.12 |
Richard Henderson <address@hidden> writes:
> From: "Emilio G. Cota" <address@hidden>
>
> The exception is not emitted anymore.
>
> Signed-off-by: Emilio G. Cota <address@hidden>
> Signed-off-by: Richard Henderson <address@hidden>
> Message-Id: <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
> ---
> linux-user/main.c | 93
> -------------------------------------------------------
> 1 file changed, 93 deletions(-)
>
> diff --git a/linux-user/main.c b/linux-user/main.c
> index 8d5c948..256382a 100644
> --- a/linux-user/main.c
> +++ b/linux-user/main.c
> @@ -651,94 +651,6 @@ do_kernel_trap(CPUARMState *env)
> return 0;
> }
>
> -/* Store exclusive handling for AArch32 */
> -static int do_strex(CPUARMState *env)
> -{
> - uint64_t val;
> - int size;
> - int rc = 1;
> - int segv = 0;
> - uint32_t addr;
> - start_exclusive();
> - if (env->exclusive_addr != env->exclusive_test) {
> - goto fail;
> - }
> - /* We know we're always AArch32 so the address is in uint32_t range
> - * unless it was the -1 exclusive-monitor-lost value (which won't
> - * match exclusive_test above).
> - */
> - assert(extract64(env->exclusive_addr, 32, 32) == 0);
> - addr = env->exclusive_addr;
> - size = env->exclusive_info & 0xf;
> - switch (size) {
> - case 0:
> - segv = get_user_u8(val, addr);
> - break;
> - case 1:
> - segv = get_user_data_u16(val, addr, env);
> - break;
> - case 2:
> - case 3:
> - segv = get_user_data_u32(val, addr, env);
> - break;
> - default:
> - abort();
> - }
> - if (segv) {
> - env->exception.vaddress = addr;
> - goto done;
> - }
> - if (size == 3) {
> - uint32_t valhi;
> - segv = get_user_data_u32(valhi, addr + 4, env);
> - if (segv) {
> - env->exception.vaddress = addr + 4;
> - goto done;
> - }
> - if (arm_cpu_bswap_data(env)) {
> - val = deposit64((uint64_t)valhi, 32, 32, val);
> - } else {
> - val = deposit64(val, 32, 32, valhi);
> - }
> - }
> - if (val != env->exclusive_val) {
> - goto fail;
> - }
> -
> - val = env->regs[(env->exclusive_info >> 8) & 0xf];
> - switch (size) {
> - case 0:
> - segv = put_user_u8(val, addr);
> - break;
> - case 1:
> - segv = put_user_data_u16(val, addr, env);
> - break;
> - case 2:
> - case 3:
> - segv = put_user_data_u32(val, addr, env);
> - break;
> - }
> - if (segv) {
> - env->exception.vaddress = addr;
> - goto done;
> - }
> - if (size == 3) {
> - val = env->regs[(env->exclusive_info >> 12) & 0xf];
> - segv = put_user_data_u32(val, addr + 4, env);
> - if (segv) {
> - env->exception.vaddress = addr + 4;
> - goto done;
> - }
> - }
> - rc = 0;
> -fail:
> - env->regs[15] += 4;
> - env->regs[(env->exclusive_info >> 4) & 0xf] = rc;
> -done:
> - end_exclusive();
> - return segv;
> -}
> -
> void cpu_loop(CPUARMState *env)
> {
> CPUState *cs = CPU(arm_env_get_cpu(env));
> @@ -908,11 +820,6 @@ void cpu_loop(CPUARMState *env)
> case EXCP_INTERRUPT:
> /* just indicate that signals should be handled asap */
> break;
> - case EXCP_STREX:
> - if (!do_strex(env)) {
> - break;
> - }
> - /* fall through for segv */
> case EXCP_PREFETCH_ABORT:
> case EXCP_DATA_ABORT:
> addr = env->exception.vaddress;
--
Alex Bennée
- [Qemu-devel] [PATCH v3 20/34] target-i386: emulate LOCK'ed NEG using cmpxchg helper, (continued)
- [Qemu-devel] [PATCH v3 20/34] target-i386: emulate LOCK'ed NEG using cmpxchg helper, Richard Henderson, 2016/09/03
- [Qemu-devel] [PATCH v3 22/34] target-i386: emulate LOCK'ed BTX ops using atomic helpers, Richard Henderson, 2016/09/03
- [Qemu-devel] [PATCH v3 27/34] target-arm: emulate LL/SC using cmpxchg helpers, Richard Henderson, 2016/09/03
- [Qemu-devel] [PATCH v3 26/34] target-arm: Rearrange aa32 load and store functions, Richard Henderson, 2016/09/03
- [Qemu-devel] [PATCH v3 32/34] target-arm: remove EXCP_STREX + cpu_exclusive_{test, info}, Richard Henderson, 2016/09/03
- [Qemu-devel] [PATCH v3 30/34] linux-user: remove handling of ARM's EXCP_STREX, Richard Henderson, 2016/09/03
- Re: [Qemu-devel] [PATCH v3 30/34] linux-user: remove handling of ARM's EXCP_STREX,
Alex Bennée <=
- [Qemu-devel] [PATCH v3 28/34] target-arm: emulate SWP with atomic_xchg helper, Richard Henderson, 2016/09/03
- [Qemu-devel] [PATCH v3 29/34] target-arm: emulate aarch64's LL/SC using cmpxchg helpers, Richard Henderson, 2016/09/03
- [Qemu-devel] [PATCH v3 31/34] linux-user: remove handling of aarch64's EXCP_STREX, Richard Henderson, 2016/09/03
- [Qemu-devel] [PATCH v3 33/34] target-alpha: Introduce MMU_PHYS_IDX, Richard Henderson, 2016/09/03
- [Qemu-devel] [PATCH v3 34/34] target-alpha: Emulate LL/SC using cmpxchg helpers, Richard Henderson, 2016/09/03