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Re: [Qemu-devel] [PULL 00/25] target-arm queue
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PULL 00/25] target-arm queue |
Date: |
Tue, 18 Oct 2016 09:25:46 +0100 |
On 17 October 2016 at 19:40, Peter Maydell <address@hidden> wrote:
> Random mix of stuff here, nothing in particular
> very large. Includes a fix for the regression running
> Thumb userspace code.
>
> thanks
> -- PMM
>
>
> The following changes since commit 0975b8b823a888d474fa33821dfe84e6904db197:
>
> Merge remote-tracking branch 'remotes/gkurz/tags/for-upstream' into staging
> (2016-10-17 16:17:51 +0100)
>
> are available in the git repository at:
>
> git://git.linaro.org/people/pmaydell/qemu-arm.git
> tags/pull-target-arm-20161017
>
> for you to fetch changes up to 041ac05672993ff33a15f8017c0f729ca6dfad73:
>
> hw/char/pl011: Add trace events (2016-10-17 19:32:44 +0100)
>
> ----------------------------------------------------------------
> target-arm:
> * target-arm: kvm: use AddressSpace-specific listener
> * aspeed: add SMC controllers
> * hw/arm/boot: allow using a command line specified dtb without a kernel
> * hw/dma/pl080: Fix bad bit mask
> * hw/intc/arm_gic_kvm: Fix build on aarch64 with some compilers
> * hw/arm/virt: fix ACPI tables for ITS
> * tests: add a m25p80 test
> * tests: cleanup ptimer-test
> * pxa2xx: Auto-assign name for i2c bus in i2c_init_bus
> * target-arm: handle tagged addresses in A64 code
> * target-arm: Fix masking of PC lower bits when doing exception returns
> * target-arm: Implement dummy MDCCINT_EL1
> * target-arm: Add trace events for the generic timers
> * hw/intc/arm_gicv3: Fix ICC register tracepoints
> * hw/char/pl011: Add trace events
Applied, thanks.
-- PMM
- [Qemu-devel] [PULL 17/25] pxa2xx: Auto-assign name for i2c bus in i2c_init_bus., (continued)
- [Qemu-devel] [PULL 17/25] pxa2xx: Auto-assign name for i2c bus in i2c_init_bus., Peter Maydell, 2016/10/17
- [Qemu-devel] [PULL 16/25] tests: cleanup ptimer-test, Peter Maydell, 2016/10/17
- [Qemu-devel] [PULL 03/25] target-arm: kvm: use AddressSpace-specific listener, Peter Maydell, 2016/10/17
- [Qemu-devel] [PULL 09/25] aspeed: add support for the SMC segment registers, Peter Maydell, 2016/10/17
- [Qemu-devel] [PULL 18/25] target-arm: Infrastucture changes to enable handling of tagged address loading into PC, Peter Maydell, 2016/10/17
- [Qemu-devel] [PULL 07/25] aspeed: add support for the AST2500 SoC SMC controllers, Peter Maydell, 2016/10/17
- [Qemu-devel] [PULL 23/25] target-arm: Add trace events for the generic timers, Peter Maydell, 2016/10/17
- [Qemu-devel] [PULL 25/25] hw/char/pl011: Add trace events, Peter Maydell, 2016/10/17
- [Qemu-devel] [PULL 06/25] aspeed: extend the number of host SPI controllers, Peter Maydell, 2016/10/17
- [Qemu-devel] [PULL 22/25] target-arm: Implement dummy MDCCINT_EL1, Peter Maydell, 2016/10/17
- Re: [Qemu-devel] [PULL 00/25] target-arm queue,
Peter Maydell <=