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Re: [Qemu-devel] [PATCH v6 13/19] cputlb: atomically update tlb fields u
Re: [Qemu-devel] [PATCH v6 13/19] cputlb: atomically update tlb fields used by tlb_reset_dirty
Thu, 10 Nov 2016 19:32:59 +0100
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On 11/10/2016 07:00 PM, Alex Bennée wrote:
I should probably expand that to default to false in the case of (sizeof
target_ulong > sizeof void *) when we don't have CONFIG_ATOMIC64.
Then if the user does force mttcg on they will quickly get an assert
although maybe we want to report that in a nicer way?
While forcing mttcg is good for testing, small hosts will definitely fail, so
there's not point in even trying. We should report it in a nicer way.
We shouldn't be checking sizeof(void*), but checking TCG_TARGET_REG_BITS. That
says how wide the host registers actually are, as opposed to the memory model
in effect -- think x86_64 in x32 mode and the like.
If the host register size is smaller than the guest register size, we should
force disable mttcg, regardles of CONFIG_ATOMIC64, because e.g. normal 64 bit
loads and stores won't be atomic.
Re: [Qemu-devel] [PATCH v6 13/19] cputlb: atomically update tlb fields used by tlb_reset_dirty, Richard Henderson, 2016/11/10
[Qemu-devel] [PATCH v6 17/19] target-arm: helpers which may affect global state need the BQL, Alex Bennée, 2016/11/09
[Qemu-devel] [PATCH v6 19/19] tcg: enable MTTCG by default for ARM on x86 hosts, Alex Bennée, 2016/11/09
Re: [Qemu-devel] [PATCH v6 00/19] Remaining MTTCG Base patches and ARM enablement, Paolo Bonzini, 2016/11/09
- Re: [Qemu-devel] [PATCH v6 16/19] target-arm: ensure BQL taken for ARM_CP_IO register access, (continued)