[Top][All Lists]

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Qemu-devel] [PATCH 1/3] target/arm: A32, T32: Create Instruction Sy

From: Peter Maydell
Subject: Re: [Qemu-devel] [PATCH 1/3] target/arm: A32, T32: Create Instruction Syndromes for Data Aborts
Date: Thu, 12 Jan 2017 21:50:35 +0000

On 12 January 2017 at 20:41, Edgar E. Iglesias <address@hidden> wrote:
> On Tue, Jan 10, 2017 at 06:44:07PM +0000, Peter Maydell wrote:
>> Add support for generating the ISS (Instruction Specific Syndrome)
>> for Data Abort exceptions taken from AArch32. These syndromes are
>> used by hypervisors for example to trap and emulate memory accesses.
>> This is the equivalent for AArch32 guests of the work done for AArch64
>> guests in commit aaa1f954d4cab243.
> Hi,
> I haven't checked the the details but I think the structure looks good.
> The patch is a large and has a few things that I think could be broken
> out into separate patches (or dropped).
> For example these kind of refactoring could be a separate patch:
>> +                bool pbit = insn & (1 << 24);
> ...
>> -                if (insn & (1 << 24))
>> +                if (pbit) {

That one should be the only refactoring, but yeah I can split it out.

> There's also a few whitespace changes that could be broken out or dropped..

Oops; I'll get rid of those.

-- PMM

reply via email to

[Prev in Thread] Current Thread [Next in Thread]