[Qemu-devel] [PATCH v4 10/15] target/ppc: add gen_op_update_ov_isa300()

[Nikunj A Dadhania]

Introduce routine to update OV and OV32 in case it is POWER9 and above.

Signed-off-by: Nikunj A Dadhania <address@hidden>
---
 target/ppc/translate.c | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index 143b595..ea0a356 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -833,6 +833,31 @@ static inline void gen_op_update_ov_legacy(TCGv ov)
     tcg_temp_free(zero);
 }
 
+static inline void gen_op_update_ov_isa300(TCGv ov, TCGv ov32)
+{
+    TCGv t1 = tcg_temp_new();
+    TCGv t2 = tcg_temp_new();
+    tcg_gen_movi_tl(t1, XER_OV | XER_OV32);
+    tcg_gen_andc_tl(cpu_xer, cpu_xer, t1);
+    tcg_gen_shli_tl(t1, ov, XER_OV_BIT);
+    tcg_gen_shli_tl(t2, ov, XER_SO_BIT);
+    tcg_gen_or_tl(t1, t1, t2);
+    tcg_gen_shli_tl(t2, ov32, XER_OV32_BIT);
+    tcg_gen_or_tl(t1, t1, t2);
+    tcg_gen_or_tl(cpu_xer, cpu_xer, t1);
+    tcg_temp_free(t1);
+    tcg_temp_free(t2);
+}
+
+static inline void gen_op_update_ov(DisasContext *ctx, TCGv ov, TCGv ov32)
+{
+    if (is_isa300(ctx)) {
+        gen_op_update_ov_isa300(ov, ov32);
+    } else {
+        gen_op_update_ov_legacy(ov);
+    }
+}
+
 /* Sub functions with one operand and one immediate */
 #define GEN_UPDATE_OV(name, const_val)          \
 static void glue(gen_op_, name)(void)           \
-- 
2.7.4