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[Qemu-devel] [PATCH v2 6/8] ppc/pnv: add a helper to calculate MMIO addr
From: |
Cédric Le Goater |
Subject: |
[Qemu-devel] [PATCH v2 6/8] ppc/pnv: add a helper to calculate MMIO addresses registers |
Date: |
Thu, 16 Mar 2017 15:35:10 +0100 |
Some controllers (ICP, PSI) have a base register address which is
calculated using the chip id.
Signed-off-by: Cédric Le Goater <address@hidden>
---
include/hw/ppc/pnv.h | 12 +++++++++++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h
index d6ef04771aff..cfd059fc49db 100644
--- a/include/hw/ppc/pnv.h
+++ b/include/hw/ppc/pnv.h
@@ -92,14 +92,24 @@ typedef struct PnvChipClass {
OBJECT_CHECK(PnvChip, (obj), TYPE_PNV_CHIP_POWER9)
/*
- * This generates a HW chip id depending on an index:
+ * This generates a HW chip id depending on an index, as found on a
+ * two socket system with dual chip modules :
*
* 0x0, 0x1, 0x10, 0x11
*
* 4 chips should be the maximum
+ *
+ * TODO: use a machine property to define the chip ids
*/
#define PNV_CHIP_HWID(i) ((((i) & 0x3e) << 3) | ((i) & 0x1))
+/*
+ * Converts back a HW chip id to an index. This is useful to calculate
+ * the MMIO addresses of some controllers which depend on the chip id.
+ */
+#define PNV_CHIP_INDEX(chip) \
+ (((chip)->chip_id >> 2) * 2 + ((chip)->chip_id & 0x3))
+
#define TYPE_POWERNV_MACHINE MACHINE_TYPE_NAME("powernv")
#define POWERNV_MACHINE(obj) \
OBJECT_CHECK(PnvMachineState, (obj), TYPE_POWERNV_MACHINE)
--
2.7.4
- Re: [Qemu-devel] [PATCH v2 1/8] ppc/xics: introduce an ICPState backlink under PowerPCCPU, (continued)
- [Qemu-devel] [PATCH v2 2/8] spapr: move the IRQ server number mapping under the machine, Cédric Le Goater, 2017/03/16
- [Qemu-devel] [PATCH v2 3/8] ppc/xics: add a realize() handler to ICPStateClass, Cédric Le Goater, 2017/03/16
- [Qemu-devel] [PATCH v2 4/8] ppc/pnv: add a PnvICPState object, Cédric Le Goater, 2017/03/16
- [Qemu-devel] [PATCH v2 5/8] ppc/pnv: create the ICP and ICS objects under the machine, Cédric Le Goater, 2017/03/16
- [Qemu-devel] [PATCH v2 6/8] ppc/pnv: add a helper to calculate MMIO addresses registers,
Cédric Le Goater <=
- [Qemu-devel] [PATCH v2 7/8] ppc/pnv: link the CPUs to the machine XICSFabric, Cédric Le Goater, 2017/03/16
- [Qemu-devel] [PATCH v2 8/8] ppc/pnv: add memory regions for the ICP registers, Cédric Le Goater, 2017/03/16