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[Qemu-devel] [PATCH 06/14] target/sh4: fix BS_EXCP exit
From: |
Aurelien Jarno |
Subject: |
[Qemu-devel] [PATCH 06/14] target/sh4: fix BS_EXCP exit |
Date: |
Tue, 2 May 2017 00:10:38 +0200 |
In case of exception, there is no need to call tcg_gen_exit_tb as the
exception helper won't return.
Also fix a few cases where BS_BRANCH is called instead of BS_EXCP.
Signed-off-by: Aurelien Jarno <address@hidden>
---
target/sh4/translate.c | 16 +++++++---------
1 file changed, 7 insertions(+), 9 deletions(-)
diff --git a/target/sh4/translate.c b/target/sh4/translate.c
index 3999da87c7..213eb2a0bb 100644
--- a/target/sh4/translate.c
+++ b/target/sh4/translate.c
@@ -339,7 +339,7 @@ static inline void gen_store_fpr64 (TCGv_i64 t, int reg)
if (ctx->envflags & (DELAY_SLOT | DELAY_SLOT_CONDITIONAL)) { \
tcg_gen_movi_i32(cpu_pc, ctx->pc); \
gen_helper_raise_slot_illegal_instruction(cpu_env); \
- ctx->bstate = BS_BRANCH; \
+ ctx->bstate = BS_EXCP; \
return; \
}
@@ -351,7 +351,7 @@ static inline void gen_store_fpr64 (TCGv_i64 t, int reg)
} else { \
gen_helper_raise_illegal_instruction(cpu_env); \
} \
- ctx->bstate = BS_BRANCH; \
+ ctx->bstate = BS_EXCP; \
return; \
}
@@ -363,7 +363,7 @@ static inline void gen_store_fpr64 (TCGv_i64 t, int reg)
} else { \
gen_helper_raise_fpu_disable(cpu_env); \
} \
- ctx->bstate = BS_BRANCH; \
+ ctx->bstate = BS_EXCP; \
return; \
}
@@ -1289,7 +1289,7 @@ static void _decode_opc(DisasContext * ctx)
imm = tcg_const_i32(B7_0);
gen_helper_trapa(cpu_env, imm);
tcg_temp_free(imm);
- ctx->bstate = BS_BRANCH;
+ ctx->bstate = BS_EXCP;
}
return;
case 0xc800: /* tst #imm,R0 */
@@ -1798,7 +1798,7 @@ static void _decode_opc(DisasContext * ctx)
} else {
gen_helper_raise_illegal_instruction(cpu_env);
}
- ctx->bstate = BS_BRANCH;
+ ctx->bstate = BS_EXCP;
}
static void decode_opc(DisasContext * ctx)
@@ -1867,7 +1867,7 @@ void gen_intermediate_code(CPUSH4State * env, struct
TranslationBlock *tb)
/* We have hit a breakpoint - make sure PC is up-to-date */
tcg_gen_movi_i32(cpu_pc, ctx.pc);
gen_helper_debug(cpu_env);
- ctx.bstate = BS_BRANCH;
+ ctx.bstate = BS_EXCP;
/* The address covered by the breakpoint must be included in
[tb->pc, tb->pc + tb->size) in order to for it to be
properly cleared -- thus we increment the PC here so that
@@ -1911,9 +1911,7 @@ void gen_intermediate_code(CPUSH4State * env, struct
TranslationBlock *tb)
gen_goto_tb(&ctx, 0, ctx.pc);
break;
case BS_EXCP:
- /* gen_op_interrupt_restart(); */
- tcg_gen_exit_tb(0);
- break;
+ /* fall through */
case BS_BRANCH:
default:
break;
--
2.11.0
- [Qemu-devel] [PATCH 00/14] target/sh4: misc fixes, cleanup and optimizations, Aurelien Jarno, 2017/05/01
- [Qemu-devel] [PATCH 05/14] target/sh4: fix BS_STOP exit, Aurelien Jarno, 2017/05/01
- [Qemu-devel] [PATCH 06/14] target/sh4: fix BS_EXCP exit,
Aurelien Jarno <=
- [Qemu-devel] [PATCH 10/14] target/sh4: optimize gen_write_sr using extract op, Aurelien Jarno, 2017/05/01
- [Qemu-devel] [PATCH 09/14] target/sh4: optimize gen_store_fpr64, Aurelien Jarno, 2017/05/01
- [Qemu-devel] [PATCH 02/14] target/sh4: get rid of DELAY_SLOT_CLEARME, Aurelien Jarno, 2017/05/01
- [Qemu-devel] [PATCH 12/14] target/sh4: implement tas.b using atomic helper, Aurelien Jarno, 2017/05/01
- [Qemu-devel] [PATCH 13/14] target/sh4: movua.l is an SH4-A only instruction, Aurelien Jarno, 2017/05/01
- [Qemu-devel] [PATCH 01/14] target/sh4: split ctx->flags into ctx->tbflags and ctx->envflags, Aurelien Jarno, 2017/05/01