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[Qemu-devel] [PULL 16/27] arm: All M profile cores are PMSA
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 16/27] arm: All M profile cores are PMSA |
Date: |
Thu, 1 Jun 2017 18:10:24 +0100 |
All M profile CPUs are PMSA, so set the feature bit.
(We haven't actually implemented the M profile MPU register
interface yet, but setting this feature bit gives us closer
to correct behaviour for the MPU-disabled case.)
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Message-id: address@hidden
---
target/arm/cpu.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 76a5e20..e748097 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -550,6 +550,14 @@ static void arm_cpu_post_init(Object *obj)
{
ARMCPU *cpu = ARM_CPU(obj);
+ /* M profile implies PMSA. We have to do this here rather than
+ * in realize with the other feature-implication checks because
+ * we look at the PMSA bit to see if we should add some properties.
+ */
+ if (arm_feature(&cpu->env, ARM_FEATURE_M)) {
+ set_feature(&cpu->env, ARM_FEATURE_PMSA);
+ }
+
if (arm_feature(&cpu->env, ARM_FEATURE_CBAR) ||
arm_feature(&cpu->env, ARM_FEATURE_CBAR_RO)) {
qdev_property_add_static(DEVICE(obj), &arm_cpu_reset_cbar_property,
--
2.7.4
- [Qemu-devel] [PULL 00/27] target-arm queue, Peter Maydell, 2017/06/01
- [Qemu-devel] [PULL 12/27] arm: Don't let no-MPU PMSA cores write to SCTLR.M, Peter Maydell, 2017/06/01
- [Qemu-devel] [PULL 11/27] arm: Don't clear ARM_FEATURE_PMSA for no-mpu configs, Peter Maydell, 2017/06/01
- [Qemu-devel] [PULL 13/27] arm: Remove unnecessary check on cpu->pmsav7_dregion, Peter Maydell, 2017/06/01
- [Qemu-devel] [PULL 10/27] arm: Clean up handling of no-MPU PMSA CPUs, Peter Maydell, 2017/06/01
- [Qemu-devel] [PULL 14/27] armv7m: Improve "-d mmu" tracing for PMSAv7 MPU, Peter Maydell, 2017/06/01
- [Qemu-devel] [PULL 09/27] arm: Use different ARMMMUIdx values for M profile, Peter Maydell, 2017/06/01
- [Qemu-devel] [PULL 16/27] arm: All M profile cores are PMSA,
Peter Maydell <=
- [Qemu-devel] [PULL 07/27] arm: Use the mmu_idx we're passed in arm_cpu_do_unaligned_access(), Peter Maydell, 2017/06/01
- [Qemu-devel] [PULL 05/27] hw/intc/arm_gicv3_cpuif: Fix priority masking for NS BPR1, Peter Maydell, 2017/06/01
- [Qemu-devel] [PULL 15/27] armv7m: Implement M profile default memory map, Peter Maydell, 2017/06/01
- [Qemu-devel] [PULL 19/27] arm: Implement HFNMIENA support for M profile MPU, Peter Maydell, 2017/06/01
- [Qemu-devel] [PULL 21/27] aspeed/i2c: handle LAST command under the RX command, Peter Maydell, 2017/06/01
- [Qemu-devel] [PULL 06/27] target/arm: clear PMUVER field of AA64DFR0 when vPMU=off, Peter Maydell, 2017/06/01
- [Qemu-devel] [PULL 02/27] load_uboot_image: don't assume a full header read, Peter Maydell, 2017/06/01
- [Qemu-devel] [PULL 01/27] libvixl: Correct build failures on NetBSD, Peter Maydell, 2017/06/01
- [Qemu-devel] [PULL 18/27] arm: add MPU support to M profile CPUs, Peter Maydell, 2017/06/01
- [Qemu-devel] [PULL 26/27] hw/arm/virt-acpi-build: build SLIT when needed, Peter Maydell, 2017/06/01