Re: [Qemu-devel] [sw-dev] RFC: QEMU RISC-V modular ISA decoding

[Markus Armbruster]

Bastian Koppelmann <address@hidden> writes:

> On 07/25/2017 06:37 PM, Bruce Hoult wrote:
>> Do you have any good estimates for how much of the execution time is
>> typically spent in instruction decode?
>> 
>> RISC-V qemu is twice as fast as ARM or Aarch64 qemu, so it's doing
>> something right!
>> 
>> (I suspect it's probably mostly the lack of needing to emulate condition
>> codes)
>
> And most likely du to no overflow calculations. I don't expect
> performance to be too big of an issue (I don't have hard data on that),
> this was just the first thing that came to mind. I was rather hoping to
> get some feedback from the s390x maintainers/qemu devs on other problems
> I'm not seeing.
>
> The important question to me: Is it worth it to refactor the code to
> allow easy extensibility or not?

A common answer to "is it worth it?" is "someone showing up with the
work is a pretty strong indicator it is to him".