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[Qemu-devel] [PULL 42/48] sdhci: add a check_capab_v3() qtest
From: |
Paolo Bonzini |
Subject: |
[Qemu-devel] [PULL 42/48] sdhci: add a check_capab_v3() qtest |
Date: |
Tue, 13 Feb 2018 13:00:46 +0100 |
From: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Stefan Hajnoczi <address@hidden>
Message-Id: <address@hidden>
---
tests/sdhci-test.c | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/tests/sdhci-test.c b/tests/sdhci-test.c
index 08bc5cd..4fdb1b4 100644
--- a/tests/sdhci-test.c
+++ b/tests/sdhci-test.c
@@ -16,6 +16,8 @@
#define SDHC_CAPAB 0x40
FIELD(SDHC_CAPAB, BASECLKFREQ, 8, 8); /* since v2 */
FIELD(SDHC_CAPAB, SDMA, 22, 1);
+FIELD(SDHC_CAPAB, SDR, 32, 3); /* since v3 */
+FIELD(SDHC_CAPAB, DRIVER, 36, 3); /* since v3 */
#define SDHC_HCVER 0xFE
static const struct sdhci_t {
@@ -159,6 +161,20 @@ static void check_capab_sdma(QSDHCI *s, bool supported)
g_assert_cmpuint(capab_sdma, ==, supported);
}
+static void check_capab_v3(QSDHCI *s, uint8_t version)
+{
+ uint64_t capab, capab_v3;
+
+ if (version < 3) {
+ /* before v3 those fields are RESERVED */
+ capab = sdhci_readq(s, SDHC_CAPAB);
+ capab_v3 = FIELD_EX64(capab, SDHC_CAPAB, SDR);
+ g_assert_cmpuint(capab_v3, ==, 0);
+ capab_v3 = FIELD_EX64(capab, SDHC_CAPAB, DRIVER);
+ g_assert_cmpuint(capab_v3, ==, 0);
+ }
+}
+
static QSDHCI *machine_start(const struct sdhci_t *test)
{
QSDHCI *s = g_new0(QSDHCI, 1);
@@ -207,6 +223,7 @@ static void test_machine(const void *data)
check_specs_version(s, test->sdhci.version);
check_capab_capareg(s, test->sdhci.capab.reg);
check_capab_readonly(s);
+ check_capab_v3(s, test->sdhci.version);
check_capab_sdma(s, test->sdhci.capab.sdma);
check_capab_baseclock(s, test->sdhci.baseclock);
--
1.8.3.1
- [Qemu-devel] [PULL 25/48] sdhci: Fix 64-bit ADMA2, (continued)
- [Qemu-devel] [PULL 25/48] sdhci: Fix 64-bit ADMA2, Paolo Bonzini, 2018/02/13
- [Qemu-devel] [PULL 34/48] sdhci: implement UHS-I voltage switch, Paolo Bonzini, 2018/02/13
- [Qemu-devel] [PULL 35/48] sdhci: implement CMD/DAT[] fields in the Present State register, Paolo Bonzini, 2018/02/13
- [Qemu-devel] [PULL 33/48] sdbus: add trace events, Paolo Bonzini, 2018/02/13
- [Qemu-devel] [PULL 29/48] hw/arm/xilinx_zynq: fix the capabilities register to match the datasheet, Paolo Bonzini, 2018/02/13
- [Qemu-devel] [PULL 31/48] sdhci: rename the hostctl1 register, Paolo Bonzini, 2018/02/13
- [Qemu-devel] [PULL 40/48] hw/arm/xilinx_zynqmp: enable the UHS-I mode, Paolo Bonzini, 2018/02/13
- [Qemu-devel] [PULL 37/48] hw/arm/bcm2835_peripherals: change maximum block size to 1kB, Paolo Bonzini, 2018/02/13
- [Qemu-devel] [PULL 38/48] hw/arm/fsl-imx6: implement SDHCI Spec. v3, Paolo Bonzini, 2018/02/13
- [Qemu-devel] [PULL 39/48] hw/arm/xilinx_zynqmp: fix the capabilities/spec version to match the datasheet, Paolo Bonzini, 2018/02/13
- [Qemu-devel] [PULL 42/48] sdhci: add a check_capab_v3() qtest,
Paolo Bonzini <=
- [Qemu-devel] [PULL 48/48] travis: use libgcc-4.8-dev (libgcc-6-dev is not available on Ubuntu 14.04), Paolo Bonzini, 2018/02/13
- [Qemu-devel] [PULL 43/48] sdhci: add Spec v4.2 register definitions, Paolo Bonzini, 2018/02/13
- [Qemu-devel] [PULL 47/48] memory: unify loops to sync dirty log bitmap, Paolo Bonzini, 2018/02/13
- [Qemu-devel] [PULL 44/48] g364fb: switch to using DirtyBitmapSnapshot, Paolo Bonzini, 2018/02/13
- [Qemu-devel] [PULL 41/48] sdhci: check Spec v3 capabilities qtest, Paolo Bonzini, 2018/02/13
- [Qemu-devel] [PULL 46/48] memory: hide memory_region_sync_dirty_bitmap behind DirtyBitmapSnapshot, Paolo Bonzini, 2018/02/13
- [Qemu-devel] [PULL 45/48] memory: remove memory_region_test_and_clear_dirty, Paolo Bonzini, 2018/02/13
- Re: [Qemu-devel] [PULL 00/48] Misc patches for 2018-02-13, Peter Maydell, 2018/02/13