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Re: [Qemu-devel] [PATCH v1 07/22] RISC-V: Remove unused class definition
From: |
Michael Clark |
Subject: |
Re: [Qemu-devel] [PATCH v1 07/22] RISC-V: Remove unused class definitions from |
Date: |
Wed, 7 Mar 2018 17:30:53 +1300 |
On Wed, Mar 7, 2018 at 5:14 PM, Michael Clark <address@hidden> wrote:
>
>
> On Wed, Mar 7, 2018 at 12:27 PM, Philippe Mathieu-Daudé <address@hidden>
> wrote:
>
>>
>> Ok until here.
>>
>> > diff --git a/include/hw/riscv/sifive_e.h b/include/hw/riscv/sifive_e.h
>> > index 0aebc57..818fbdc 100644
>> > --- a/include/hw/riscv/sifive_e.h
>> > +++ b/include/hw/riscv/sifive_e.h
>> > @@ -19,16 +19,7 @@
>> > #ifndef HW_SIFIVE_E_H
>> > #define HW_SIFIVE_E_H
>> >
>> > -#define TYPE_SIFIVE_E "riscv.sifive_e"
>> > -
>> > -#define SIFIVE_E(obj) \
>> > - OBJECT_CHECK(SiFiveEState, (obj), TYPE_SIFIVE_E)
>> > -
>> > typedef struct SiFiveEState {
>> > - /*< private >*/
>> > - SysBusDevice parent_obj;
>>
>> I'd keep however a 'Object parent_obj' here, to stay QOM; but your patch
>> is valid.
>>
>
> Okay I'll keep parent_obj when I respin.
>
BTW is the string constant in DEFINE_MACHINE a QOM type?
i.e. should I keep the type conversion and type name macros and use the
type name macro in DEFINE_MACHINE?
- [Qemu-devel] [PATCH v1 01/22] RISC-V: Make virt create_fdt interface consistent, (continued)
- [Qemu-devel] [PATCH v1 01/22] RISC-V: Make virt create_fdt interface consistent, Michael Clark, 2018/03/06
- [Qemu-devel] [PATCH v1 02/22] RISC-V: Replace hardcoded constants with enum values, Michael Clark, 2018/03/06
- [Qemu-devel] [PATCH v1 03/22] RISC-V: Make virt board description match spike, Michael Clark, 2018/03/06
- [Qemu-devel] [PATCH v1 04/22] RISC-V: Use ROM base address and size from memory, Michael Clark, 2018/03/06
- [Qemu-devel] [PATCH v1 05/22] RISC-V: Remove redundant identity_translate from, Michael Clark, 2018/03/06
- [Qemu-devel] [PATCH v1 06/22] RISC-V: Mark ROM read-only after copying in code and, Michael Clark, 2018/03/06
- [Qemu-devel] [PATCH v1 07/22] RISC-V: Remove unused class definitions from, Michael Clark, 2018/03/06
- [Qemu-devel] [PATCH v1 08/22] RISC-V: Make sure the emulated rom has space for, Michael Clark, 2018/03/06
- [Qemu-devel] [PATCH v1 09/22] RISC-V: Include hexidecimal instruction in, Michael Clark, 2018/03/06
- [Qemu-devel] [PATCH v1 11/22] RISC-V: Improve page table walker spec compliance, Michael Clark, 2018/03/06
- [Qemu-devel] [PATCH v1 10/22] RISC-V: Hold rcu_read_lock when accessing memory, Michael Clark, 2018/03/06
- [Qemu-devel] [PATCH v1 12/22] RISC-V: Update E order and I extension order, Michael Clark, 2018/03/06
- [Qemu-devel] [PATCH v1 13/22] RISC-V: Make spike and virt header guards more, Michael Clark, 2018/03/06
- [Qemu-devel] [PATCH v1 15/22] RISC-V: Use memory_region_is_ram in atomic pte, Michael Clark, 2018/03/06