[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PULL 02/25] hw/arm: Set the core count for Xilinx's ZynqMP
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 02/25] hw/arm: Set the core count for Xilinx's ZynqMP |
Date: |
Fri, 9 Mar 2018 17:25:59 +0000 |
From: Alistair Francis <address@hidden>
Set the ARM CPU core count property for the A53's attached to the Xilnx
ZynqMP machine.
Signed-off-by: Alistair Francis <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
hw/arm/xlnx-zynqmp.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
index 69227fd4c9..465796e97c 100644
--- a/hw/arm/xlnx-zynqmp.c
+++ b/hw/arm/xlnx-zynqmp.c
@@ -282,6 +282,8 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error
**errp)
s->virt, "has_el2", NULL);
object_property_set_int(OBJECT(&s->apu_cpu[i]), GIC_BASE_ADDR,
"reset-cbar", &error_abort);
+ object_property_set_int(OBJECT(&s->apu_cpu[i]), num_apus,
+ "core-count", &error_abort);
object_property_set_bool(OBJECT(&s->apu_cpu[i]), true, "realized",
&err);
if (err) {
--
2.16.2
- [Qemu-devel] [PULL 12/25] arm: fix load ELF error leak, (continued)
- [Qemu-devel] [PULL 12/25] arm: fix load ELF error leak, Peter Maydell, 2018/03/09
- [Qemu-devel] [PULL 13/25] arm: avoid heap-buffer-overflow in load_aarch64_image, Peter Maydell, 2018/03/09
- [Qemu-devel] [PULL 10/25] aarch64-linux-user: Add support for SVE signal frame records, Peter Maydell, 2018/03/09
- [Qemu-devel] [PULL 15/25] target/arm: Move definition of 'host' cpu type into cpu.c, Peter Maydell, 2018/03/09
- [Qemu-devel] [PULL 09/25] aarch64-linux-user: Add support for EXTRA signal frame records, Peter Maydell, 2018/03/09
- [Qemu-devel] [PULL 19/25] hw/arm/virt: Support -machine gic-version=max, Peter Maydell, 2018/03/09
- [Qemu-devel] [PULL 16/25] target/arm: Add "-cpu max" support, Peter Maydell, 2018/03/09
- [Qemu-devel] [PULL 08/25] aarch64-linux-user: Remove struct target_aux_context, Peter Maydell, 2018/03/09
- [Qemu-devel] [PULL 06/25] linux-user: Implement aarch64 PR_SVE_SET/GET_VL, Peter Maydell, 2018/03/09
- [Qemu-devel] [PULL 07/25] aarch64-linux-user: Split out helpers for guest signal handling, Peter Maydell, 2018/03/09
- [Qemu-devel] [PULL 02/25] hw/arm: Set the core count for Xilinx's ZynqMP,
Peter Maydell <=
- [Qemu-devel] [PULL 22/25] sdcard: Display which protocol is used when tracing (SD or SPI), Peter Maydell, 2018/03/09
- [Qemu-devel] [PULL 21/25] sdcard: Display command name when tracing CMD/ACMD, Peter Maydell, 2018/03/09
- [Qemu-devel] [PULL 01/25] target/arm: Add a core count property, Peter Maydell, 2018/03/09
- [Qemu-devel] [PULL 14/25] target/arm: Query host CPU features on-demand at instance init, Peter Maydell, 2018/03/09
- [Qemu-devel] [PULL 05/25] Implement support for i.MX7 Sabre board, Peter Maydell, 2018/03/09
- [Qemu-devel] [PULL 18/25] hw/arm/virt: Add "max" to the list of CPU types "virt" supports, Peter Maydell, 2018/03/09
- [Qemu-devel] [PULL 03/25] pci: Add support for Designware IP block, Peter Maydell, 2018/03/09
- [Qemu-devel] [PULL 17/25] target/arm: Make 'any' CPU just an alias for 'max', Peter Maydell, 2018/03/09
- [Qemu-devel] [PULL 20/25] sdcard: Do not trace CMD55, except when we already expect an ACMD, Peter Maydell, 2018/03/09
- [Qemu-devel] [PULL 24/25] sdhci: Fix a typo in comment, Peter Maydell, 2018/03/09