Re: [Qemu-devel] [PATCH 0/9] target/arm: Fixups for ARM_FEATURE_V8_FP16

[Alex Bennée]

Richard Henderson <address@hidden> writes:

> When running the gcc testsuite with current aarch64-linux-user,
> the testsuite detects the presence of the fp16 extension and
> enables lots of extra tests for builtins.
>
> Quite a few of these new tests fail because we missed implementing
> some instructions.  We really should go back and verify that nothing
> else is missing from this (rather large) extension.
>
> In addition, it tests some edge conditions on data that show flaws
> in the way we were performing integer<->fp conversion; particularly
> with respect to scaled conversion.

I've finished reviewing this patch set.

> PS: FWIW, this was written against my tgt-arm-sve-9 tree, since I
> was trying to test sve as generated by gcc.  I don't *think* there
> are any dependencies on any of the sve patches, but I didn't check.

They aren't.

>
> PPS: There are two more failures that might be qemu fp16 failures,
> but those are SIGSEGV.  This patch set cures all of the SIGILL and
> (subsequent) SIGABRT type failures within the testsuite.

I've also pushed the fix to sqrt_f16 (passing cpu_env rather than fpst).
Are you happy rolling my fixes into your v2?

>
>
> Richard Henderson (9):
>   target/arm: Implement vector shifted SCVF/UCVF for fp16
>   target/arm: Implement vector shifted FCVT for fp16
>   target/arm: Fix float16 to/from int16
>   target/arm: Clear SVE high bits for FMOV
>   target/arm: Implement FMOV (general) for fp16
>   target/arm: Implement FCVT (scalar,integer) for fp16
>   target/arm: Implement FCVT (scalar,fixed-point) for fp16
>   target/arm: Implement FP data-processing (2 source) for fp16
>   target/arm: Implement FP data-processing (3 source) for fp16
>
>  target/arm/helper.h        |   6 +
>  target/arm/helper.c        |  87 ++++++++++-
>  target/arm/translate-a64.c | 371 
> +++++++++++++++++++++++++++++++++++++--------
>  3 files changed, 399 insertions(+), 65 deletions(-)


--
Alex Bennée