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[Qemu-devel] [PATCH v4 0/8] Maintenance and misc fixes and improvements
From: |
Aleksandar Markovic |
Subject: |
[Qemu-devel] [PATCH v4 0/8] Maintenance and misc fixes and improvements |
Date: |
Fri, 6 Jul 2018 13:48:44 +0200 |
From: Aleksandar Markovic <address@hidden>
v3->v4:
- accepted suggestion on better format of bit definitions in patch 3
- fixed build errors caused by a mistake in patch 4
- removed spurious comments in patch 4
- added setting lower 16 bits to 0 in patch 5
- used proper email address for a reviewer in patch 7 commit message
v2->v3:
- replaced invalid @imgtec.com and @mips.com in "From:",,
"Signed-off-by:", "Reviewed-by:" lines with the most current
email addresses for a particular person
- fixed build errors that appeared because of a mistake during
integration
v1->v2:
- fixed recipient's email addresses
Maintenance issues, fixes, and improvements collected during recent
development. Some of them are related to the upcoming nanoMIPS changes.
Note: These patches are, of course, supposed to be applied AFTER soft
freeze.
Aleksandar Markovic (4):
target/mips: Update maintainer's email addresses
target/mips: Workaround for checkpatch.pl hanging on msa_helper.c
target/mips: Update some CP0 registers bit definitions
target/mips: Avoid case statements formulated by ranges
Stefan Markovic (1):
target/mips: Add CP0 BadInstrX register
Yongbok Kim (3):
target/mips: Amend CP0 WatchHi register implementation
target/mips: Don't update BadVAddr register in Debug Mode
target/mips: Check ELPA flag only in some cases of MFHC0 and MTHC0
.mailmap | 7 +-
MAINTAINERS | 9 +-
target/mips/cpu.h | 41 +++---
target/mips/helper.c | 4 +-
target/mips/helper.h | 3 +
target/mips/machine.c | 7 +-
target/mips/msa_helper.c | 4 +-
target/mips/op_helper.c | 35 +++++-
target/mips/translate.c | 315 ++++++++++++++++++++++++++++++++++++++---------
9 files changed, 339 insertions(+), 86 deletions(-)
--
2.7.4
- [Qemu-devel] [PATCH v4 0/8] Maintenance and misc fixes and improvements,
Aleksandar Markovic <=
- [Qemu-devel] [PATCH v4 5/8] target/mips: Add CP0 BadInstrX register, Aleksandar Markovic, 2018/07/06
- [Qemu-devel] [PATCH v4 1/8] target/mips: Update maintainer's email addresses, Aleksandar Markovic, 2018/07/06
- [Qemu-devel] [PATCH v4 4/8] target/mips: Avoid case statements formulated by ranges, Aleksandar Markovic, 2018/07/06
- [Qemu-devel] [PATCH v4 3/8] target/mips: Update some CP0 registers bit definitions, Aleksandar Markovic, 2018/07/06
- [Qemu-devel] [PATCH v4 8/8] target/mips: Check ELPA flag only in some cases of MFHC0 and MTHC0, Aleksandar Markovic, 2018/07/06