[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH v2 1/6] hw/riscv/virtio: Set the soc device tree nod
From: |
Alistair Francis |
Subject: |
[Qemu-devel] [PATCH v2 1/6] hw/riscv/virtio: Set the soc device tree node as a simple-bus |
Date: |
Mon, 9 Jul 2018 17:27:59 -0700 |
To allow Linux to ennumerate devices on the /soc/ node set it as a
"simple-bus".
Signed-off-by: Alistair Francis <address@hidden>
---
hw/riscv/virt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index aeada2498d..5336166f6d 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -121,7 +121,7 @@ static void *create_fdt(RISCVVirtState *s, const struct
MemmapEntry *memmap,
qemu_fdt_add_subnode(fdt, "/soc");
qemu_fdt_setprop(fdt, "/soc", "ranges", NULL, 0);
- qemu_fdt_setprop_string(fdt, "/soc", "compatible", "riscv-virtio-soc");
+ qemu_fdt_setprop_string(fdt, "/soc", "compatible", "simple-bus");
qemu_fdt_setprop_cell(fdt, "/soc", "#size-cells", 0x2);
qemu_fdt_setprop_cell(fdt, "/soc", "#address-cells", 0x2);
--
2.17.1
- [Qemu-devel] [PATCH v2 0/6] Connect a PCIe host and graphics support to RISC-V, Alistair Francis, 2018/07/09
- [Qemu-devel] [PATCH v2 1/6] hw/riscv/virtio: Set the soc device tree node as a simple-bus,
Alistair Francis <=
- [Qemu-devel] [PATCH v2 2/6] hw/riscv/virt: Increase the number of interrupts, Alistair Francis, 2018/07/09
- [Qemu-devel] [PATCH v2 3/6] hw/riscv/virt: Connect the gpex PCIe, Alistair Francis, 2018/07/09
- [Qemu-devel] [PATCH v2 4/6] hw/riscv/virt: Connect a VGA PCIe device, Alistair Francis, 2018/07/09
- [Qemu-devel] [PATCH v2 5/6] hw/riscv/sifive_u: Connect the Xilinx PCIe, Alistair Francis, 2018/07/09
- [Qemu-devel] [PATCH v2 6/6] riscv64-softmmu.mak: Build Virtio Block support, Alistair Francis, 2018/07/09