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[Qemu-devel] [PATCH v3 36/40] mips_malta: Setup GT64120 BARs in nanoMIPS
From: |
Stefan Markovic |
Subject: |
[Qemu-devel] [PATCH v3 36/40] mips_malta: Setup GT64120 BARs in nanoMIPS bootloader |
Date: |
Thu, 19 Jul 2018 14:55:08 +0200 |
From: Paul Burton <address@hidden>
Setup the GT64120 BARs in the nanoMIPS bootloader, in the same way that
they are setup in the MIPS32 bootloader. This is necessary for Linux to
be able to access peripherals, including the UART.
Signed-off-by: Paul Burton <address@hidden>
Signed-off-by: Yongbok Kim <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>
Reviewed-by: Aleksandar Markovic <address@hidden>
---
hw/mips/mips_malta.c | 73 ++++++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 73 insertions(+)
diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
index 4bc9036..d1a7c1f 100644
--- a/hw/mips/mips_malta.c
+++ b/hw/mips/mips_malta.c
@@ -664,6 +664,79 @@ static void write_bootloader_nanomips(uint8_t *base,
int64_t run_addr,
/* lui a3,%hi(loaderparams.ram_low_size) */
stw_p(p++, 0x80e7); stw_p(p++, NM_LO(loaderparams.ram_low_size));
/* ori a3,a3,%lo(loaderparams.ram_low_size) */
+
+ /* Load BAR registers as done by YAMON */
+ stw_p(p++, 0xe040); stw_p(p++, 0x0681);
+ /* lui t1, %hi(0xb4000000) */
+#ifdef TARGET_WORDS_BIGENDIAN
+ stw_p(p++, 0xe020); stw_p(p++, 0x0be1);
+ /* lui t0, %hi(0xdf000000) */
+#else
+ stw_p(p++, 0x0020); stw_p(p++, 0x00df);
+ /* addiu[32] t0, $0, 0xdf */
+#endif
+ stw_p(p++, 0x8422); stw_p(p++, 0x9068);
+ /* sw t0, 0x68(t1) */
+
+ stw_p(p++, 0xe040); stw_p(p++, 0x077d);
+ /* lui t1, %hi(0xbbe00000) */
+#ifdef TARGET_WORDS_BIGENDIAN
+ stw_p(p++, 0xe020); stw_p(p++, 0x0801);
+ /* lui t0, %hi(0xc0000000) */
+#else
+ stw_p(p++, 0x0020); stw_p(p++, 0x00c0);
+ /* addiu[32] t0, $0, 0xc0 */
+#endif
+ stw_p(p++, 0x8422); stw_p(p++, 0x9048);
+ /* sw t0, 0x48(t1) */
+#ifdef TARGET_WORDS_BIGENDIAN
+ stw_p(p++, 0xe020); stw_p(p++, 0x0800);
+ /* lui t0, %hi(0x40000000) */
+#else
+ stw_p(p++, 0x0020); stw_p(p++, 0x0040);
+ /* addiu[32] t0, $0, 0x40 */
+#endif
+ stw_p(p++, 0x8422); stw_p(p++, 0x9050);
+ /* sw t0, 0x50(t1) */
+
+#ifdef TARGET_WORDS_BIGENDIAN
+ stw_p(p++, 0xe020); stw_p(p++, 0x0001);
+ /* lui t0, %hi(0x80000000) */
+#else
+ stw_p(p++, 0x0020); stw_p(p++, 0x0080);
+ /* addiu[32] t0, $0, 0x80 */
+#endif
+ stw_p(p++, 0x8422); stw_p(p++, 0x9058);
+ /* sw t0, 0x58(t1) */
+#ifdef TARGET_WORDS_BIGENDIAN
+ stw_p(p++, 0xe020); stw_p(p++, 0x07e0);
+ /* lui t0, %hi(0x3f000000) */
+#else
+ stw_p(p++, 0x0020); stw_p(p++, 0x003f);
+ /* addiu[32] t0, $0, 0x3f */
+#endif
+ stw_p(p++, 0x8422); stw_p(p++, 0x9060);
+ /* sw t0, 0x60(t1) */
+
+#ifdef TARGET_WORDS_BIGENDIAN
+ stw_p(p++, 0xe020); stw_p(p++, 0x0821);
+ /* lui t0, %hi(0xc1000000) */
+#else
+ stw_p(p++, 0x0020); stw_p(p++, 0x00c1);
+ /* addiu[32] t0, $0, 0xc1 */
+#endif
+ stw_p(p++, 0x8422); stw_p(p++, 0x9080);
+ /* sw t0, 0x80(t1) */
+#ifdef TARGET_WORDS_BIGENDIAN
+ stw_p(p++, 0xe020); stw_p(p++, 0x0bc0);
+ /* lui t0, %hi(0x5e000000) */
+#else
+ stw_p(p++, 0x0020); stw_p(p++, 0x005e);
+ /* addiu[32] t0, $0, 0x5e */
+#endif
+ stw_p(p++, 0x8422); stw_p(p++, 0x9088);
+ /* sw t0, 0x88(t1) */
+
stw_p(p++, 0xe320 | NM_HI1(kernel_entry));
stw_p(p++, NM_HI2(kernel_entry));
/* lui t9,%hi(kernel_entry) */
--
2.7.4
- Re: [Qemu-devel] [PATCH v3 09/40] target/mips: Add emulation of nanoMIPS 16-bit save and restore instructions, (continued)
- [Qemu-devel] [PATCH v3 21/40] target/mips: Implement DSP ASE support for nanoMIPS, Stefan Markovic, 2018/07/19
- [Qemu-devel] [PATCH v3 28/40] target/mips: Adjust exception_resume_pc() for nanoMIPS, Stefan Markovic, 2018/07/19
- [Qemu-devel] [PATCH v3 18/40] target/mips: Add emulation of nanoMIPS 32-bit load and store instructions, Stefan Markovic, 2018/07/19
- [Qemu-devel] [PATCH v3 20/40] target/mips: Implement MT ASE support for nanoMIPS, Stefan Markovic, 2018/07/19
- [Qemu-devel] [PATCH v3 36/40] mips_malta: Setup GT64120 BARs in nanoMIPS bootloader,
Stefan Markovic <=
- [Qemu-devel] [PATCH v3 29/40] target/mips: Adjust set_hflags_for_handler() for nanoMIPS, Stefan Markovic, 2018/07/19
- [Qemu-devel] [PATCH v3 40/40] target/mips: Add definition of nanoMIPS I7200 CPU, Stefan Markovic, 2018/07/19
- [Qemu-devel] [PATCH v3 10/40] target/mips: Add emulation of some common nanoMIPS 32-bit instructions, Stefan Markovic, 2018/07/19
- [Qemu-devel] [PATCH v3 17/40] target/mips: Implement emulation of nanoMIPS EXTW instruction, Stefan Markovic, 2018/07/19