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[Qemu-devel] [PATCH 75/99] fpu/softfloat: Fix conversion from uint64 to
From: |
Michael Roth |
Subject: |
[Qemu-devel] [PATCH 75/99] fpu/softfloat: Fix conversion from uint64 to float128 |
Date: |
Mon, 23 Jul 2018 15:17:24 -0500 |
From: Petr Tesarik <address@hidden>
The significand is passed to normalizeRoundAndPackFloat128() as high
first, low second. The current code passes the integer first, so the
result is incorrectly shifted left by 64 bits.
This bug affects the emulation of s390x instruction CXLGBR (convert
from logical 64-bit binary-integer operand to extended BFP result).
Cc: address@hidden
Tested-by: Alex Bennée <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Petr Tesarik <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
(cherry picked from commit 6603d50648901e8b9e6d66ec1142accf0b1df1e6)
Signed-off-by: Michael Roth <address@hidden>
---
fpu/softfloat.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index 9bcaaebe4f..a926b91864 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -3147,7 +3147,7 @@ float128 uint64_to_float128(uint64_t a, float_status
*status)
if (a == 0) {
return float128_zero;
}
- return normalizeRoundAndPackFloat128(0, 0x406E, a, 0, status);
+ return normalizeRoundAndPackFloat128(0, 0x406E, 0, a, status);
}
--
2.17.1
- [Qemu-devel] [PATCH 68/99] blockjob: expose error string via query, (continued)
- [Qemu-devel] [PATCH 68/99] blockjob: expose error string via query, Michael Roth, 2018/07/23
- [Qemu-devel] [PATCH 69/99] target/arm: Fix fp_status_f16 tininess before rounding, Michael Roth, 2018/07/23
- [Qemu-devel] [PATCH 70/99] fpu/softfloat: Don't set Invalid for float-to-int(MAXINT), Michael Roth, 2018/07/23
- [Qemu-devel] [PATCH 06/99] tcg/arm: Fix memory barrier encoding, Michael Roth, 2018/07/23
- [Qemu-devel] [PATCH 72/99] target/arm: Implement vector shifted FCVT for fp16, Michael Roth, 2018/07/23
- [Qemu-devel] [PATCH 71/99] target/arm: Implement vector shifted SCVF/UCVF for fp16, Michael Roth, 2018/07/23
- [Qemu-devel] [PATCH 73/99] target/arm: Fix float16 to/from int16, Michael Roth, 2018/07/23
- [Qemu-devel] [PATCH 74/99] target/arm: Clear SVE high bits for FMOV, Michael Roth, 2018/07/23
- [Qemu-devel] [PATCH 76/99] target/arm: Implement FMOV (general) for fp16, Michael Roth, 2018/07/23
- [Qemu-devel] [PATCH 77/99] target/arm: Implement FCVT (scalar, integer) for fp16, Michael Roth, 2018/07/23
- [Qemu-devel] [PATCH 75/99] fpu/softfloat: Fix conversion from uint64 to float128,
Michael Roth <=
- [Qemu-devel] [PATCH 78/99] target/arm: Implement FCVT (scalar, fixed-point) for fp16, Michael Roth, 2018/07/23
- [Qemu-devel] [PATCH 80/99] target/arm: Implement FP data-processing (2 source) for fp16, Michael Roth, 2018/07/23
- [Qemu-devel] [PATCH 79/99] target/arm: Introduce and use read_fp_hreg, Michael Roth, 2018/07/23
- [Qemu-devel] [PATCH 07/99] target/arm: Implement v8M VLLDM and VLSTM, Michael Roth, 2018/07/23
- [Qemu-devel] [PATCH 81/99] target/arm: Implement FP data-processing (3 source) for fp16, Michael Roth, 2018/07/23
- [Qemu-devel] [PATCH 84/99] target/arm: Implement FMOV (immediate) for fp16, Michael Roth, 2018/07/23
- [Qemu-devel] [PATCH 83/99] target/arm: Implement FCSEL for fp16, Michael Roth, 2018/07/23
- [Qemu-devel] [PATCH 82/99] target/arm: Implement FCMP for fp16, Michael Roth, 2018/07/23
- [Qemu-devel] [PATCH 85/99] target/arm: Fix sqrt_f16 exception raising, Michael Roth, 2018/07/23
- [Qemu-devel] [PATCH 86/99] hw/isa/superio: Fix inconsistent use of Chardev->be, Michael Roth, 2018/07/23