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Re: [Qemu-devel] [PATCH 2/7] target/mips: Add MXU instructions S32I2M an
From: |
Aleksandar Markovic |
Subject: |
Re: [Qemu-devel] [PATCH 2/7] target/mips: Add MXU instructions S32I2M and S32M2I |
Date: |
Mon, 27 Aug 2018 13:25:27 +0000 |
> From: Janeczek, Craig <address@hidden>
> Sent: Monday, August 27, 2018 2:22 PM
>
> Subject: RE: [Qemu-devel] [PATCH 2/7] target/mips: Add MXU instructions
> S32I2M and S32M2I
>
> https://github.com/MIPS/CI20_mplayer/blob/ci20_mplayer/mxu_as
>
> Sorry I mis-read our comment. The bit layouts were pulled from
> this script and validated by visually examining compiled code.
I think Richard brings to your attention that the structure definitions using
bit fields may yield different results on little and big endian hosts, which is
certainly the situation you want to avooid, and recommends using extract32(),
or similar QEMU feature, instead.
Aleksandar
[Qemu-devel] [PATCH 1/7] target/mips: Add MXU register support, Craig Janeczek, 2018/08/24
[Qemu-devel] [PATCH 4/7] target/mips: Add MXU instruction D16MUL, Craig Janeczek, 2018/08/24
[Qemu-devel] [PATCH 3/7] target/mips: Add MXU instruction S8LDD, Craig Janeczek, 2018/08/24
[Qemu-devel] [PATCH 7/7] target/mips: Add MXU instructions S32LDD and S32LDDR, Craig Janeczek, 2018/08/24
[Qemu-devel] [PATCH 5/7] target/mips: Add MXU instruction D16MAC, Craig Janeczek, 2018/08/24