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[Qemu-devel] [PATCH v5 4/8] target/mips: Add function to signal RI excep

From: Fredrik Noring
Subject: [Qemu-devel] [PATCH v5 4/8] target/mips: Add function to signal RI exception unless user only
Date: Sun, 16 Sep 2018 17:04:12 +0200

The Linux kernel traps and emulates certain instructions. For user only,
QEMU is the kernel, so we emulate those traps by simply emulating the
instructions directly.

Signed-off-by: Fredrik Noring <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
 target/mips/translate.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/target/mips/translate.c b/target/mips/translate.c
index c35be0053b..2fe46f8775 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -1887,6 +1887,18 @@ static inline void check_insn_opc_removed(DisasContext 
*ctx, int flags)
+ * Unless user only, when the kernel emulates the code, a "reserved
+ * instruction" exception is generated if the CPU has corresponding
+ * flag set which indicates that the instruction has been removed.
+ */
+static inline void check_insn_opc_user_only(DisasContext *ctx, int flags)
+    check_insn_opc_removed(ctx, flags);
 /* This code generates a "reserved instruction" exception if the
    CPU does not support 64-bit paired-single (PS) floating point data type */
 static inline void check_ps(DisasContext *ctx)

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