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Re: [Qemu-devel] [PATCH v5 2/8] target/mips: Support R5900 specific thre

From: Maciej W. Rozycki
Subject: Re: [Qemu-devel] [PATCH v5 2/8] target/mips: Support R5900 specific three-operand MULT and MULTU
Date: Wed, 26 Sep 2018 23:43:46 +0100 (BST)
User-agent: Alpine 2.21 (LFD 202 2017-01-01)

On Thu, 27 Sep 2018, Philippe Mathieu-Daudé wrote:

> > +static void gen_mul_r5900(DisasContext *ctx, uint32_t opc,
> > +                          int acc, int rd, int rs, int rt)
> Since we have acc = 0 we can directly use cpu_LO[0] and cpu_HI[0],
> removing needs for an 'acc' argument.

 Corresponding MULT1 and MULTU1 instructions use `acc = 1' though, as do 
similar variations of all the other MDU instructions.  Maybe the addition 
of the required `acc' argument could be staged for a separate patch with 
all the pipeline 1 MDU instructions though.


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