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Re: [Qemu-devel] [PULL v2 00/10] riscv-pullreq queue
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PULL v2 00/10] riscv-pullreq queue |
Date: |
Mon, 24 Sep 2018 17:13:53 +0100 |
On 5 September 2018 at 23:09, Alistair Francis <address@hidden> wrote:
> The following changes since commit 19b599f7664b2ebfd0f405fb79c14dd241557452:
>
> Merge remote-tracking branch 'remotes/armbru/tags/pull-error-2018-08-27-v2'
> into staging (2018-08-27 16:44:20 +0100)
>
> are available in the Git repository at:
>
> address@hidden:alistair23/qemu.git tags/pull-riscv-pullreq-20180905
>
> for you to fetch changes up to 1ca79ece35a5bcdcefb5a2582bc6da91f0640bf2:
>
> riscv: remove define cpu_init() (2018-09-05 09:58:38 -0700)
>
> ----------------------------------------------------------------
> A misc collection of RISC-V related patches for 3.1.
>
> ----------------------------------------------------------------
> Alistair Francis (2):
> hw/riscv/virtio: Set the soc device tree node as a simple-bus
> hw/riscv/spike: Set the soc device tree node as a simple-bus
>
> Emilio G. Cota (3):
> target/riscv: optimize cross-page direct jumps in softmmu
> target/riscv: optimize indirect branches
> target/riscv: call gen_goto_tb on DISAS_TOO_MANY
>
> Igor Mammedov (1):
> riscv: remove define cpu_init()
>
> Michael Clark (4):
> RISC-V: Update address bits to support sv39 and sv48
> RISC-V: Improve page table walker spec compliance
> RISC-V: Use atomic_cmpxchg to update PLIC bitmaps
> RISC-V: Simplify riscv_cpu_local_irqs_pending
>
Applied, thanks.
-- PMM
- [Qemu-devel] [PULL v2 00/10] riscv-pullreq queue, Alistair Francis, 2018/09/05
- [Qemu-devel] [PULL v2 01/10] RISC-V: Update address bits to support sv39 and sv48, Alistair Francis, 2018/09/05
- [Qemu-devel] [PULL v2 02/10] RISC-V: Improve page table walker spec compliance, Alistair Francis, 2018/09/05
- [Qemu-devel] [PULL v2 03/10] RISC-V: Use atomic_cmpxchg to update PLIC bitmaps, Alistair Francis, 2018/09/05
- [Qemu-devel] [PULL v2 09/10] hw/riscv/spike: Set the soc device tree node as a simple-bus, Alistair Francis, 2018/09/05
- [Qemu-devel] [PULL v2 05/10] target/riscv: optimize cross-page direct jumps in softmmu, Alistair Francis, 2018/09/05
- [Qemu-devel] [PULL v2 04/10] RISC-V: Simplify riscv_cpu_local_irqs_pending, Alistair Francis, 2018/09/05
- [Qemu-devel] [PULL v2 07/10] target/riscv: call gen_goto_tb on DISAS_TOO_MANY, Alistair Francis, 2018/09/05
- [Qemu-devel] [PULL v2 06/10] target/riscv: optimize indirect branches, Alistair Francis, 2018/09/05
- [Qemu-devel] [PULL v2 08/10] hw/riscv/virtio: Set the soc device tree node as a simple-bus, Alistair Francis, 2018/09/05
- Re: [Qemu-devel] [PULL v2 00/10] riscv-pullreq queue,
Peter Maydell <=