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[Qemu-devel] [PULL 18/45] target/arm: New utility function to extract EC
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 18/45] target/arm: New utility function to extract EC from syndrome |
Date: |
Fri, 19 Oct 2018 17:57:08 +0100 |
Create and use a utility function to extract the EC field
from a syndrome, rather than open-coding the shift.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
---
target/arm/internals.h | 5 +++++
target/arm/helper.c | 4 ++--
target/arm/kvm64.c | 2 +-
target/arm/op_helper.c | 2 +-
4 files changed, 9 insertions(+), 4 deletions(-)
diff --git a/target/arm/internals.h b/target/arm/internals.h
index 6b204fad51e..bf7bd1fbfe1 100644
--- a/target/arm/internals.h
+++ b/target/arm/internals.h
@@ -278,6 +278,11 @@ enum arm_exception_class {
#define ARM_EL_IL (1 << ARM_EL_IL_SHIFT)
#define ARM_EL_ISV (1 << ARM_EL_ISV_SHIFT)
+static inline uint32_t syn_get_ec(uint32_t syn)
+{
+ return syn >> ARM_EL_EC_SHIFT;
+}
+
/* Utility functions for constructing various kinds of syndrome value.
* Note that in general we follow the AArch64 syndrome values; in a
* few cases the value in HSR for exceptions taken to AArch32 Hyp
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 1928d3fadd9..26872edef75 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -8336,7 +8336,7 @@ static void arm_cpu_do_interrupt_aarch32(CPUState *cs)
uint32_t moe;
/* If this is a debug exception we must update the DBGDSCR.MOE bits */
- switch (env->exception.syndrome >> ARM_EL_EC_SHIFT) {
+ switch (syn_get_ec(env->exception.syndrome)) {
case EC_BREAKPOINT:
case EC_BREAKPOINT_SAME_EL:
moe = 1;
@@ -8676,7 +8676,7 @@ void arm_cpu_do_interrupt(CPUState *cs)
if (qemu_loglevel_mask(CPU_LOG_INT)
&& !excp_is_internal(cs->exception_index)) {
qemu_log_mask(CPU_LOG_INT, "...with ESR 0x%x/0x%" PRIx32 "\n",
- env->exception.syndrome >> ARM_EL_EC_SHIFT,
+ syn_get_ec(env->exception.syndrome),
env->exception.syndrome);
}
diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c
index 5411486491a..5de8ff0ac57 100644
--- a/target/arm/kvm64.c
+++ b/target/arm/kvm64.c
@@ -933,7 +933,7 @@ int kvm_arch_remove_sw_breakpoint(CPUState *cs, struct
kvm_sw_breakpoint *bp)
bool kvm_arm_handle_debug(CPUState *cs, struct kvm_debug_exit_arch *debug_exit)
{
- int hsr_ec = debug_exit->hsr >> ARM_EL_EC_SHIFT;
+ int hsr_ec = syn_get_ec(debug_exit->hsr);
ARMCPU *cpu = ARM_CPU(cs);
CPUClass *cc = CPU_GET_CLASS(cs);
CPUARMState *env = &cpu->env;
diff --git a/target/arm/op_helper.c b/target/arm/op_helper.c
index d9155797126..90741f6331d 100644
--- a/target/arm/op_helper.c
+++ b/target/arm/op_helper.c
@@ -42,7 +42,7 @@ void raise_exception(CPUARMState *env, uint32_t excp,
* (see DDI0478C.a D1.10.4)
*/
target_el = 2;
- if (syndrome >> ARM_EL_EC_SHIFT == EC_ADVSIMDFPACCESSTRAP) {
+ if (syn_get_ec(syndrome) == EC_ADVSIMDFPACCESSTRAP) {
syndrome = syn_uncategorized();
}
}
--
2.19.1
- [Qemu-devel] [PULL 31/45] target/arm: Use gvec for NEON_2RM_VMN, NEON_2RM_VNEG, (continued)
- [Qemu-devel] [PULL 31/45] target/arm: Use gvec for NEON_2RM_VMN, NEON_2RM_VNEG, Peter Maydell, 2018/10/19
- [Qemu-devel] [PULL 30/45] target/arm: Use gvec for NEON_3R_VADD_VSUB insns, Peter Maydell, 2018/10/19
- [Qemu-devel] [PULL 29/45] target/arm: Use gvec for NEON_3R_LOGIC insns, Peter Maydell, 2018/10/19
- [Qemu-devel] [PULL 27/45] target/arm: Use gvec for NEON VDUP, Peter Maydell, 2018/10/19
- [Qemu-devel] [PULL 28/45] target/arm: Use gvec for NEON VMOV, VMVN, VBIC & VORR (immediate), Peter Maydell, 2018/10/19
- [Qemu-devel] [PULL 26/45] target/arm: Mark some arrays const, Peter Maydell, 2018/10/19
- [Qemu-devel] [PULL 25/45] target/arm: Promote consecutive memory ops for aa64, Peter Maydell, 2018/10/19
- [Qemu-devel] [PULL 24/45] target/arm: Use tcg_gen_gvec_dup_i64 for LD[1-4]R, Peter Maydell, 2018/10/19
- [Qemu-devel] [PULL 23/45] target/arm: Don't call tcg_clear_temp_count, Peter Maydell, 2018/10/19
- [Qemu-devel] [PULL 19/45] target/arm: Get IL bit correct for v7 syndrome values, Peter Maydell, 2018/10/19
- [Qemu-devel] [PULL 18/45] target/arm: New utility function to extract EC from syndrome,
Peter Maydell <=
- [Qemu-devel] [PULL 17/45] target/arm: Implement HCR.PTW, Peter Maydell, 2018/10/19
- [Qemu-devel] [PULL 16/45] target/arm: Implement HCR.VI and VF, Peter Maydell, 2018/10/19
- [Qemu-devel] [PULL 15/45] target/arm: ISR_EL1 bits track virtual interrupts if IMO/FMO set, Peter Maydell, 2018/10/19
- [Qemu-devel] [PULL 14/45] target/arm: Implement HCR.DC, Peter Maydell, 2018/10/19
- [Qemu-devel] [PULL 12/45] target/arm: Make switch_mode() file-local, Peter Maydell, 2018/10/19
- [Qemu-devel] [PULL 13/45] target/arm: Implement HCR.FB, Peter Maydell, 2018/10/19